Biostar M5ATC, Manual

Page: 34 / 50

Chapter 1 System Board
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: Enabled Passive Release : Enabled
AT Bus Clock : CLK 2/4 ISA Line Buffer : Enabled
DRAM Write WS : X-2-2-2 Delay Transaction : Disabled
Page Mode Read WS : X-3-3-3
RAS Precharge Period : 3T
RAS-To-CAS Delay Time : 3T
EDO Read WS : X-2-2-2
DRAM Speculative Read : Disabled
SDRAM CAS Latency : 3
SDRAM Access Timing : 3-4-7
SDRAM Speculative Read : Disabled
Pipelined Function : Enabled
DRAM Refresh Period : 30 us
DRAM Data Integrity Mode : Disabled
Memory Hole At 15M-16M : Disabled
Primary Frame Buffer : 2 MB ESC : Quit : Select Item
*VGA Frame Buffer : Enabled F1 : Help PU/PD/+/- : Modify
Data Merge : Enabled F5 : Old Values <Shift> F2 : Color
Byte Merge : Disabled F7 : Load Setup Defaults
Fast Back-to-Bcak : Disabled
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Auto Configuration