SCHEMA
SCHEMA
TIC DIAGRAM
TIC DIAGRAM
- 28 -
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
ODD0+
INT_TX0-
ODD0-
ODD1+
INT_TX1-
ODD1-
IN
INT_TXCLK-
ODDCLK-
ODD2+
ODD2-
INT_TX2-
INT_TX3-
ODD3+
ODD3-
ODD2+
ODD1-
ODD2-
ODDCLK-
ODD3-
ODD0+
ODD0-
ODD1+
ODD3+
ODD1-
ODD1+
ODD0+
ODD0-
ODD3+
ODDCLK-
ODD3-
ODD2+
ODD2-
ODD4+
ODD4-
DRE3
DGE8
DRE8
DGE9
DRE6
DRE7
DGE7
DGE2
DGE5
DRE5
DGE6
DGE3
DGE4
DRE4
DRE2
DRE9
ODD4+
ODD4-
ODD4-
ODD4+
INT_TX4-
DBE9
DBE2
DBE8
DBE3
DBE6
DBE7
DBE5
DBE4
DGE0
DGE1
DRE1
DRE0
DBE0
DBE1
VLD33
VCC3.3
VLD33
DBE[9:0]
DGE[9:0]
DRE[9:0]
DHS
DVS
DEN
DCLK
LVDS_ON
INT_TX2-
INT_TXCLK-
IN
INT_TX1-
INT_TX0-
INT_TX3-
VS_ON
ACD
SDA2
LG_SLE
SCL2
LG_DISPEN
DHS
DVS
DEN
DCLK
LVDS_ON
INT_TX4-
DGE[9:0]
DRE[9:0]
DGE[9:0]
Title
Size
Document Number
Rev
Date:
S
heet
of
PW218+VCT_PDP
03
LVDS BLOCK
A2
71
0
Tuesday, June 07, 2005
Title
Size
Document Number
Rev
Date:
S
heet
of
PW218+VCT_PDP
03
LVDS BLOCK
A2
71
0
Tuesday, June 07, 2005
Title
Size
Document Number
Rev
Date:
S
heet
of
PW218+VCT_PDP
03
LVDS BLOCK
A2
71
0
Tuesday, June 07, 2005
TSSOP56
Internal LVDS TX
LG / FORMOSA
FMS
LG
IRQ
CPUGO
PWDN
PDPGO
ACD
RLY_ON
LG_DISPEN
LG_SLE
SIGNAL STATUS
TEST POINT Arrangement Bottom
TSSOP56
10BIT LVDS OPTION
2005-03-28
10BIT LVDS OPTION
2005-03-28
10BIT LVDS OPTION
2005-03-29
TP59TP59
TP64TP64
C224
100nF
C224
100nF
R226
22R/10BIT
R226
22R/10BIT
R181
22R
R181
22R
R187
22R
R187
22R
R225
22R/10BIT
R225
22R/10BIT
C338
100nF/10BIT
C338
100nF/10BIT
TP60TP60
R227
22R/10BIT
R227
22R/10BIT
R228
22R/10BIT
R228
22R/10BIT
FB29
HB-1M2012-221JT
FB29
HB-1M2012-221JT
R221
0R/FORMOSA
R221
0R/FORMOSA
R216
0R/LG
R216
0R/LG
C339
100nF/10BIT
C339
100nF/10BIT
R182
22R
R182
22R
R188
22R
R188
22R
R229
22R/10BIT
R229
22R/10BIT
TP14TP14
TP18TP18
C340
100nF/10BIT
C340
100nF/10BIT
R26
4.7K/NC
R26
4.7K/NC
R220
0R/FORMOSA
R220
0R/FORMOSA
1
3
4
8
7
6
5
2
RA12
NC
RA12
NC
TP15TP15
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
1
31
J11
1554A-3141R(LVDS PANEL CONNECTOR)
J11
1554A-3141R(LVDS PANEL CONNECTOR)
R183
22R
R183
22R
R223
1k/NC
R223
1k/NC
R189
22R
R189
22R
TP19TP19
TP66TP66
TP16TP16
C342
100nF/10BIT
C342
100nF/10BIT
R180
22R
R180
22R
R230
22R/10BIT
R230
22R/10BIT
R218
100R
R218
100R
TP20TP20
C221
100nF
C221
100nF
R184
22R
R184
22R
TP22TP22
C341
100nF/10BIT
C341
100nF/10BIT
TP67TP67
R231
22R/10BIT
R231
22R/10BIT
TP21TP21
TP71TP71
TP23TP23
C222
100nF
C222
100nF
1
2
+
C219
22uF/16V
+
C219
22uF/16V
R185
22R
R185
22R
VCC
1
TxIN0
51
TxIN1
52
TxIN2
54
TxIN3
55
TxIN4
56
TxIN5
2
TxIN6
3
TxIN7
4
TxIN8
6
TxIN9
7
TxIN10
8
TxIN11
10
TxIN12
11
TxIN13
12
TxIN14
14
TxIN15
15
TxIN16
16
TxIN17
18
TxIN18
19
TxIN19
20
TxIN20
22
TxIN21
23
TxIN22
24
TxIN23
25
TxIN24
27
TxIN26
30
TxIN27
50
R_FB
17
TxIN25
28
GND
5
GND
13
GND
21
GND
29
GND
53
VCC
9
VCC
26
LVDS GND
36
LVDS GND
43
LVDS GND
49
PLL GND
35
PLL VCC
34
PLL GND
33
TxCLK IN
31
PWRDWN
32
TxCLKOUT-
40
T
39
TxOUT0-
48
47
TxOUT1-
46
45
TxOUT2-
42
41
TxOUT3-
38
37
LVDS VCC
44
U15
THC63LVDM83R
U15
THC63LVDM83R
TP61TP61
R219
0R/LG
R219
0R/LG
TP72TP72
C223
100nF
C223
100nF
FB34
HB-1M2012-221JT/10BIT
FB34
HB-1M2012-221JT/10BIT
R232
22R/10BIT
R232
22R/10BIT
TP65TP65
TP62TP62
1
2
+
C337
22uF/16V/10BIT
+
C337
22uF/16V/10BIT
TP58TP58
R186
22R
R186
22R
C220
100nF
C220
100nF
R217
100R
R217
100R
VCC
1
TxIN0
51
TxIN1
52
TxIN2
54
TxIN3
55
TxIN4
56
TxIN5
2
TxIN6
3
TxIN7
4
TxIN8
6
TxIN9
7
TxIN10
8
TxIN11
10
TxIN12
11
TxIN13
12
TxIN14
14
TxIN15
15
TxIN16
16
TxIN17
18
TxIN18
19
TxIN19
20
TxIN20
22
TxIN21
23
TxIN22
24
TxIN23
25
TxIN24
27
TxIN26
30
TxIN27
50
R_FB
17
TxIN25
28
GND
5
GND
13
GND
21
GND
29
GND
53
VCC
9
VCC
26
LVDS GND
36
LVDS GND
43
LVDS GND
49
PLL GND
35
PLL VCC
34
PLL GND
33
TxCLK IN
31
PWRDWN
32
TxCLKOUT-
40
T
39
TxOUT0-
48
47
TxOUT1-
46
45
TxOUT2-
42
41
TxOUT3-
38
37
LVDS VCC
44
U41
THC63LVDM83R/10BIT
U41
THC63LVDM83R/10BIT
TP63TP63
R233
22R/10BIT
R233
22R/10BIT
1
3
4
8
7
6
5
2
RA11
NC
RA11
NC
1
3
4
8
7
6
5
2
RA13
NC
RA13
NC
R224
22R/10BIT
R224
22R/10BIT
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