Benison V7, Service Manual

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V7
4
2) First Mixer
The signal from the RF amplifier is heterodyned with the first local oscillator signal from
the PLL frequency synthesizer circuit at the first mixer (T202) to create a 38.85MHz first
intermediate frequency (1st IF) signal. The first IF signal is then fed through crystal filters
(FL231,FL232) to further remove spurious signals.
3) IF amplifier
The first IF signal is amplified by T203, and then enters U200 (FM processing IC). The
signal is heterodyned again with a second local oscillator signal within U200 to create a
450kHz second IF signal. The second IF signal is then fed through a 450kHz ceramic filter
(FL240) to further eliminate unwanted signals before it is amplified and FM detected in
FL240.
4) AF amplifier
The recovered AF signal obtained from U200 goes to the microprocessor(U811). The
processed AF signal passes through an AF volume control and is amplified to a sufficient
level to drive a loud speaker by an AF power amplifier (U481).
5) Squelch
Part of the AF signal from the IC enters the FM IC again,and the noise component is
amplified and rectified by a filter and an amplifier to produce a DC voltage corresponding
to the noise level. The DC signal from the FM IC goes to the analog port of the
microprocessor (U811). U811 determines whether to output sounds from the speaker by
checking whether the input voltage is higher or lower than the preset value.To output
sounds from the speaker, U811 sends a high signal to the AF Power Iines and turns U481
on through T471,T472.
6) Receive signaling
QT/DQT
The output signal from FM IC (U200) enters the microprocessor(U811) .U811 determines
whether the QT or DQT matches the preset value, and controls the AF Power and the
speaker output sounds according to the squelch results
3. PLL frequency synthesizer
The PLL circuit generates the first local oscillator signal for reception and the RF signal for
transmission.
1) PLL
The frequency step of the PLL circuit is 5 and 6.25kHz and so on. A 16.8MHz reference
oscillator signal is divided at U301 by a fixed counter to produce the 5 or 6.25kHz
reference frequency. The voltage controlled oscillator (VCO) output signal is buffer
amplified by T373, then divided in U301 by a programmable counter . The divided signal is
compared in phase with the 5 or 6.25kHz reference signal in the phase comparator in
U301. The output signal from the phase comparator is filtrered through a low-pass filter
and passed to the VCO to control the oscillator frequency.
2) VCO
The operating frequency is generated by T331 in transmit mode and T357 in receive
mode. The oscillator frequency is controlled by applying the VCO control voltage, obtained
from the phase comparator, to the varactor diodes (D331 and D332 in transmit mode and
D350 and D351 in receive mode). The TC/RC pin is set low in receive mode causing T192
off, and turn T291 on . The TC/RC pin is set hight in transmit mode causing T291 off,and
T192,T191 on.