USB5841 Data Acquisition
Figure 5.4 Mode 3
Note: A GATE transition should not occur one clock prior to terminal count.
MODE 4 Software triggered strobe
OUT will be initially high. When the initial count expires, OUT will go low for one CLK pulse and then go high again.
The counting sequence is “triggered” by writing the initial count.
GATE=1 enables counting; GATE=0 disables counting. GATE has no effect on OUT.
After writing a Control Word and initial count, the Counter will be loaded on the next CLK pulse. This CLK pulse does
not decrement the count, so for an initial count of N, OUT does not strobe low until N+1 CLK pulses after the initial
count is written.
If a new count is written during counting, if will be loaded on the next CLK pulse and counting will continue from the
new count. If a two-byte count is written, the following happens:
1) Writing the first byte has no effect on counting.
2) Writing the second byte allows the new count to be loaded on the next CLK pulse.
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