Access from the user program
KL6781
19
Version: 2.0.0
4.2
Control and status word
Process data mode
Control word (in process data mode)
The control word (CW) is located in the
, and is transmitted from the controller
to the terminal.
Bit
CW.15 CW.14 CW.13 CW.12 CW.11 CW.10 CW.9
CW.8
CW.7
CW.6
CW.5
CW.4
CW.3
CW.2
CW.1
CW.0
Name
OL7
OL6
OL5
OL4
OL3
OL2
OL1
OL0
Reg
-
-
-
-
IR
RA
TR
Key
Bit
Name
Description
CW.15 ... CW.
8
OL7 ... OL0
(OutLenght)
1
dec
...
22
dec
Number of output bytes () available for transfer from the
controller to the terminal.
CW.7
Reg (RegAccess)
0
bin
Register communication off (process data mode)
CW.6 ... CW.3 -
0
bin
reserved
CW.2
IR
(InitRequest)
0
bin
The controller once again requests the terminal to prepare for
serial data exchange.
1
bin
The controller requests terminal for initialization. The
transmission and reception functions are disabled, the FIFO
pointers are reset and the interface is initialized with the
values in the appropriate registers. The terminal
acknowledges completion of the initialization via bit
(IA).
CW.1
RA
(ReceiveAccepted)
toggle
The controller acknowledges receipt of data by changing the
state of this bit. Only then new data can be transferred from
the terminal to the controller.
CW.0
TR
(TransmitRequest)
toggle
Via a change of state of this bit the controller notifies the
terminal that the DataOut bytes contain the number of bytes
indicated via the OL bits. The terminal acknowledges receipt
of the data in the status byte via a change of state of bit
(TA). Only now new data can be transferred from the
controller to the terminal.
Status word (in process data mode)
The status word (SW) is located in the
, and is transmitted from terminal to the
controller.
Bit
SW.15 SW.14 SW.13 SW.12 SW.11 SW.10 SW.9
SW.8
SW.7
SW.6
SW.5
SW.4 SW.3
SW.2 SW.1
SW.0
Name
IL7
IL6
IL5
IL4
IL3
IL2
IL1
IL0
Reg
-
-
-
BUF_F
IA
RR
TA