BeagleBone LCD7 Cape
System Reference Manual
Revision A3
Page 19 of 27
5.0
System Architecture and Design
This section provides a high level description of the design of the BeagleBone LCD7
Cape and its overall architecture.
5.1
System Block Diagram
Figure 7 is the high level block diagram of the BeagleBone LCD7 Cape.
J1
B
E
A
G
L
E
B
O
N
E
C
O
N
N
J2
B
E
A
G
L
E
B
O
N
E
C
O
N
N
J5
E
X
P
C
O
N
N
E
C
T
O
R
J6
E
X
P
C
O
N
N
E
C
T
O
R
U1
32-BIT TRANSCEIVER
(74AVC32T245)
P2
L
C
D
C
O
N
N
E
C
T
O
R
16
LCD_DATA[0..15]
4
LCD_CONTROL
16
LCD_DATA[0..15]
4
LCD_CONTROL
U2
LCD SUPPLY
(TPS65105)
AVDD_10V
VGH_15V
VGL_-7V
VCOM
VDD_LCD
LCD_AVDD_EN
P3
TOUCHSREEN
CONNECTOR
AIN[0..3]
4
P5
BACKLIGHT
CONNECTOR
U3
DC/DC BOOST
(TPS61080)
EHRPWM1A
2
LED+/-
U4
EEPROM
(CAT24C256W)
I2C2
2
SWITCHES
LED
GPIO
GPIO
46
46
J3
B
L
C
O
N
N
J4
B
L
C
O
N
N
10
7
Figure 5. BeagleBone LCD7 Cape High Level Block Diagram
