BCM Advanced Research MX852E-C10 Series, User Manual

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MX855E/ MX852E-C10 Series
24 MX855E/ MX852E-C10 Series User’s Manual
1.6.11.2 Realtek RTL8100S Gigabit Ethernet Controller (MX855E/ MX852E-C10)
The Realtek RTL8110SB(L) LOM Gigabit Ethernet controllers (RTL8110SB (128 QFP) &
RTL8110SBL (128 LQFP)) combine a triple-speed IEEE 802.3 compliant Media Access
Controller (MAC) with a triple-speed Ethernet transceiver, 32-bit PCI bus controller, and
embedded memory. With state-of-the-art DSP technology and mixed-mode signal
technology, they offer high-speed transmission over CAT 5 UTP cable or CAT 3 UTP
(10Mbps only) cable. Functions such as Crossover Detection & Auto-Correction, polarity
correction, adaptive equalization, cross-talk cancellation, echo cancellation, timing recovery,
and error correction are implemented to provide robust transmission and reception
capability at high speeds.
The devices support the PCI v2.3 bus interface for host communications with power
management and are compliant with the IEEE 802.3 specification for 10/100Mbps Ethernet
and the IEEE 802.3ab specification for 1000Mbps Ethernet. They also support an auxiliary
power auto-detect function, and will auto-configure related bits of the PCI power
management registers in PCI configuration space.
They support the Advanced Configuration Power management Interface (ACPI)--power
management for modern operating systems that are capable of Operating System-directed
Power Management (OSPM)--to achieve the most efficient power management possible.
PCI Message Signaled Interrupt (MSI) is also supported.
In addition to the ACPI feature, the RTL8110SB(L) support remote wake-up (including AMD
Magic Packet, Re-LinkOk, and Microsoft® Wake-up frame) in both ACPI and APM
(Advanced Power Management) environments. The LWAKE pin provides four different
output signals including active high, active low, positive pulse, and negative pulse. The
versatility of the LWAKE pin provides motherboards with Wake-On-LAN (WOL)
functionality. To support WOL from a deep power down state (e.g. D3cold, i.e. main power
is off and only auxiliary exists), the auxiliary power source must be able to provide the
needed power for the RTL8110SB(L).
The RTL8110SB(L) is fully compliant with Microsoft® NDIS5 (IP, TCP, UDP) Checksum
and Segmentation Task-offload features, and supports IEEE 802 IP Layer 2 priority
encoding and 802.1Q Virtual bridged Local Area Network (VLAN). The above features
contribute to lowering CPU utilization, especially benefiting performance when in operation
on a network server. Also, the devices boost their PCI performance by supporting PCI
Memory Read Line & Memory Read Multiple when transmitting, and Memory Write and
Invalidate when receiving. To better qualify for server use, the RTL8110SB(L) support the
PCI Dual Address Cycle (DAC) command when the assigned buffers reside at a physical
memory address higher than 4 Gigabytes.