
A
A
B
B
C
C
D
D
E
E
4
4
3
3
2
2
1
1
TERMINATION
AT E5.1
DDR TERMINATION VOLTAGE REGULATOR
TERMINATION
AT DDR
The VTT side of the terminaton resistors should be placed
on a wide VTT island on the surface layer. The island is
located at each end of the bus, so it does not interfere
with the signal routing.
VREF should be routed over a
reference plane and isolated, and possibly
shielded with both SSTL2_VDD and SSTL2_GND
VREF needs to be decoupled
to both SSTL2_VDD and SSTL2_GND with balanced
decoupling capacitors.
A0
DDR TERMINATION
BBKAV Corporation
C
3
12
Wednesday, June 01, 2005
Title
Size
Document Number
Rev
Date:
Sheet
of
SDRAM_CS0
E5_SDRAM_DQ0
E5_SDRAM_DQ1
E5_SDRAM_DQ2
E5_SDRAM_DQ3
E5_SDRAM_DQ4
E5_SDRAM_DQ5
E5_SDRAM_DQ6
E5_SDRAM_DQ7
E5_SDRAM_DQ8
E5_SDRAM_DQ9
E5_SDRAM_DQ10
E5_SDRAM_DQ11
E5_SDRAM_DQ12
E5_SDRAM_DQ13
E5_SDRAM_DQ14
E5_SDRAM_DQ15
E5_SDRAM_DQ16
E5_SDRAM_DQ17
E5_SDRAM_DQ18
E5_SDRAM_DQ19
E5_SDRAM_DQ20
E5_SDRAM_DQ21
E5_SDRAM_DQ22
E5_SDRAM_DQ23
E5_SDRAM_DQ27
E5_SDRAM_DQ26
E5_SDRAM_DQ25
E5_SDRAM_DQ24
E5_SDRAM_DQ31
E5_SDRAM_DQ29
E5_SDRAM_DQ30
E5_SDRAM_DQ28
SDRAM_CLK1
SDRAM_CLK#1
SDRAM_CLK#0
SDRAM_CLK0
SDRAM_RAS#
SDRAM_WE#
SDRAM_CLKE
SDRAM_CAS#
SDRAM_A5
SDRAM_A3
SDRAM_A15
SDRAM_A4
SDRAM_A9
SDRAM_A14
SDRAM_A11
SDRAM_A0
SDRAM_A2
SDRAM_A12
SDRAM_A8
SDRAM_A6
SDRAM_A7
SDRAM_A1
SDRAM_DQM3
SDRAM_DQM2
SDRAM_DQS2
SDRAM_DQS3
SDRAM_DQS0
SDRAM_DQS1
SDRAM_A10
SDRAM_DQM0
SDRAM_DQM1
VREF
GND_SSTL2
GND_SSTL2
VREF
GND_SSTL2
GND_SSTL2
GND_SSTL2
VREF
SDRAM_DQ9
SDRAM_DQ3
SDRAM_DQ5
SDRAM_DQ12
SDRAM_DQ14
SDRAM_DQ21
SDRAM_DQ24
SDRAM_DQ6
SDRAM_DQ29
SDRAM_DQ31
SDRAM_DQ10
SDRAM_DQ13
SDRAM_DQ16
SDRAM_DQ18
SDRAM_DQ14
SDRAM_DQ2
SDRAM_DQ8
SDRAM_DQ4
SDRAM_DQ19
SDRAM_DQ25
SDRAM_DQ27
SDRAM_DQ2
SDRAM_DQ10
SDRAM_DQ11
SDRAM_DQ25
SDRAM_DQ4
SDRAM_DQ3
SDRAM_DQ17
SDRAM_DQ26
SDRAM_DQ27
SDRAM_DQ1
SDRAM_DQ17
SDRAM_DQ23
SDRAM_DQ15
SDRAM_DQ12
SDRAM_DQ20
SDRAM_DQ21
SDRAM_DQ5
SDRAM_DQ1
SDRAM_DQ0
SDRAM_DQ28
SDRAM_DQ22
SDRAM_DQ7
SDRAM_DQ15
SDRAM_DQ8
SDRAM_DQ29
SDRAM_DQ22
SDRAM_DQ7
SDRAM_DQ28
SDRAM_DQ13
SDRAM_DQ9
SDRAM_DQ11
SDRAM_DQ19
SDRAM_DQ26
SDRAM_DQ24
SDRAM_DQ6
SDRAM_DQ20
SDRAM_DQ30
SDRAM_DQ16
SDRAM_DQ18
SDRAM_DQ0
SDRAM_DQ30
SDRAM_DQ23
SDRAM_DQ31
VTT
VTT
SDRAM_DQ[31..0]
4
E5_SDRAM_DQ[31..0]
2
SDRAM_DQS1 4
SDRAM_DQS2 4
SDRAM_DQS0 4
SDRAM_DQS3 4
SDRAM_DQM2 4
SDRAM_DQM3 4
SDRAM_DQM1 4
SDRAM_DQM0 4
SDRAM_CLK#1 4
SDRAM_CLK1 4
SDRAM_CLK0 4
SDRAM_CLK#0 4
SDRAM_CS0 4
SDRAM_A0 4
SDRAM_A2 4
SDRAM_A1 4
SDRAM_A3 4
E5_SDRAM_CLK#1 2
E5_SDRAM_CLK1 2
E5_SDRAM_CLK0 2
E5_SDRAM_CLK#0 2
E5_SDRAM_CAS# 2
E5_SDRAM_CS0 2
SDRAM_DQ[31..0]
4
E5_SDRAM_DQM0 2
E5_SDRAM_DQM2 2
E5_SDRAM_DQM1 2
E5_SDRAM_DQM3 2
E5_SDRAM_DQS0 2
E5_SDRAM_DQS2 2
E5_SDRAM_DQS1 2
E5_SDRAM_DQS3 2
SDRAM_A4 4
VREF
2,4
VREF
2,4
VREF
2,4
E5_SDRAM_RAS# 2
E5_SDRAM_CLKE 2
E5_SDRAM_WE# 2
E5_SDRAM_A3 2
E5_SDRAM_A15 2
E5_SDRAM_A1 2
E5_SDRAM_A6 2
E5_SDRAM_A12 2
E5_SDRAM_A14 2
E5_SDRAM_A9 2
E5_SDRAM_A4 2
E5_SDRAM_A2 2
E5_SDRAM_A5 2
E5_SDRAM_A0 2
E5_SDRAM_A11 2
E5_SDRAM_A7 2
E5_SDRAM_A8 2
E5_SDRAM_A10 2
SDRAM_A7 4
SDRAM_A5 4
SDRAM_A6 4
SDRAM_A8 4
SDRAM_A11 4
SDRAM_A9 4
SDRAM_A10 4
SDRAM_A12 4
SDRAM_A14 4
SDRAM_A15 4
SDRAM_RAS# 4
SDRAM_CLKE 4
SDRAM_CAS# 4
SDRAM_WE# 4
VTT
SSTL2_VDD
SSTL2_VDD
VTT
SSTL2_VDD
SSTL2_VDD
VTT
VTT
SSTL2_VDD
C98
102
RP26 22/RP
1
8
2
7
3
6
4
5
RP14 51/RP
1
8
2
7
3
6
4
5
RP7
51/RP
1
8
2
7
3
6
4
5
C80
104
R62
51
RP24 22/RP
1
8
2
7
3
6
4
5
RP9
51/RP
1
8
2
7
3
6
4
5
C64
104
RP11 51/RP
1
8
2
7
3
6
4
5
RP23 51/RP
1
8
2
7
3
6
4
5
RP13 51/RP
1
8
2
7
3
6
4
5
C79
104
RP15 51/RP
1
8
2
7
3
6
4
5
R49
51
RP20 22/RP
1
8
2
7
3
6
4
5
RP16 51/RP
1
8
2
7
3
6
4
5
R51
51
C93
102
+
CA4
220u/16
C81
102
RP18 51/RP
1
8
2
7
3
6
4
5
RP25 51/RP
1
8
2
7
3
6
4
5
C78
103
R61
51
C90
103
C60
104
C77
103
+
CA3
220u/16
C59
103
C89
103
C62
103
C84
104
C96
104
U2
LP2995
1
2
3
4
5
6
7
8
NC
GND
VSENSE
VREF
VDDQ
AVIN
PVIN
VTT
R71
51
R70
51
RP30
22/RP
1
8
2
7
3
6
4
5
C91
104
C85
104
C76
104
C103
104
R59
51
R69
51
R63
51
C95
102
C65
103
C83
102
R64
51
R50
51
C66
103
C101
104
RP22 22/RP
1
8
2
7
3
6
4
5
C58
104
C69
104
C71
103
R66
51
C92
104
R52
51
C72
103
C70
104
C67
104
+
C99
10u/16 SMT
R65
51
R48
51
RP27
51/RP
1
8
2
7
3
6
4
5
C68
104
C88
104
RP44 22/RP
1
8
2
7
3
6
4
5
C73
104
+
C100
10u/16 SMT
C75
104
R47
51
RP29 51/RP
1
8
2
7
3
6
4
5
C74
104
RP10 51/RP
1
8
2
7
3
6
4
5
C61
104
C87
104
RP17 51/RP
1
8
2
7
3
6
4
5
RP21
51/RP
1
8
2
7
3
6
4
5
RP5
51/RP
1
8
2
7
3
6
4
5
C94
102
RP6 51/RP
1
8
2
7
3
6
4
5
C82
102
RP8
51/RP
1
8
2
7
3
6
4
5
C63
104
R57
51
C104
104
RP12 51/RP
1
8
2
7
3
6
4
5
C102
104
RP19
51/RP
1
8
2
7
3
6
4
5
C97
104
R53
51
RP28 22/RP
1
8
2
7
3
6
4
5
R67
51
R54
51
C57
104
C86
102
26
Summary of Contents for DW9951S
Page 1: ...SERVICE MANUAL DW9951S R Ver 0 0 ...
Page 3: ...1 ...
Page 4: ...2 ...
Page 5: ...3 ...
Page 6: ...BLOCK DIAGRAM 4 ...
Page 7: ...5 EXPLODED VIEW ...
Page 15: ...14 13 ...
Page 16: ...15 14 ...
Page 17: ...16 15 ...
Page 18: ...17 IS2 16 ...
Page 24: ...22 ...
Page 26: ...11 Terminal for External Connection Outline Drawing 24 ...
Page 38: ...36 ...
Page 39: ...37 ...
Page 40: ...38 ...
Page 41: ...39 ...
Page 50: ...48 ...
Page 51: ...49 ...
Page 52: ...50 ...
Page 53: ...51 ...
Page 55: ...53 ...
Page 56: ...54 ...
Page 57: ...55 ...
Page 58: ...56 ...
Page 60: ...58 ...
Page 61: ...59 ...
Page 73: ...BBK ELECTRONICS CORP LTD 23 Bubugao Road Wusha Chang an Dongguan China http www gdbbk com ...