KEY FEATURES
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Single Power Supply Operation
– Read, program and erase operations from
2.7 to 3.6 volts
– Ideal for battery-powered applications
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High Performance
– 65, 90 and 120 ns access time versions
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Ultra-low Power Consumption (Typical
Values At 5 Mhz)
– Automatic sleep mode current: 0.2 µA
– Standby mode current: 0.2 µA
– Read current: 7 mA
– Program/erase current: 15 mA
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Flexible Sector Architecture:
– One 16 KB, two 8 KB, one 32 KB and
fifteen 64 KB sectors in byte mode
– One 8 KW, two 4 KW, one 16 KW and
fifteen 32 KW sectors in byte mode
– Top or bottom boot block configurations
available
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Sector Protection
– Allows locking of a sector or sectors to
prevent program or erase operations
within that sector
– Sectors lockable in-system or via
programming equipment
– Temporary Sector Unprotect allows
changes in locked sectors (requires high
voltage on RESET# pin)
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Fast Program and Erase Times
– Sector erase time: 0.7 sec typical for each
sector
– Chip erase time: 14 sec typical
– Byte program time: 9
µ
s typical
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Unlock Bypass Program Command
– Reduces programming time when issuing
multiple program command sequences
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Automatic Erase Algorithm Preprograms
and Erases Any Combination of Sectors
or the Entire Chip
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Automatic Program Algorithm Writes and
Verifies Data at Specified Addresses
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Compliant With Common Flash Memory
Interface (CFI) Specification
– Flash device parameters stored directly
on the device
– Allows software driver to identify and use
a variety of different current and future
Flash products
Product Brief
Revision 1, March 2000
A[18:0]
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LOGIC DIAGRAM
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Minimum 100,000 Write Cycles per Sector
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Compatible With JEDEC standards
– Pinout and software compatible with
single-power supply Flash devices
– Superior inadvertent write protection
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Data# Polling and Toggle Bits
– Provide software confirmation of
completion of program and erase
operations
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Ready/Busy# Pin
– Provides hardware confirmation of
completion of program and erase
operations
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Erase Suspend/Erase Resume
– Suspends an erase operation to allow
reading data from, or programming data
to, a sector that is not being erased
– Erase Resume can then be invoked to
complete suspended erasure
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Hardware Reset Pin (RESET#) Resets the
Device to Reading Array Data
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Space Efficient Packaging
– 44-pin PSOP, 48-pin TSOP and 48-ball
FBGA packages
HY29LV800
8 Mbit (1M x 8/512K x 16) Low Voltage Flash Memory
Summary of Contents for DV963SM
Page 1: ...SERVICE MANUAL ECHO VOL DV963SM...
Page 6: ...5 1 Optical pickup Unit Explosed View and Part List Pic 1...
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