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Axiom DEMO9S08LG32, User Manual, Page: 18 / 18

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18

 

Figure 15: LCD Enable Option Header 

– JP1 

MCU 
Pin # 

MCU Signal 

LCD Signal 

JP1 Pos # 

JP1 

Pin 

LCD Pin 

14 

PTB0/LCD29 

LCD29 

1 

1 

2 

44 

13 

PTB1/LCD30 

LCD30 

2 

3 

4 

43 

12 

PTB4/LCD37 

LCD37 

3 

5 

6 

42 

11 

PTB5/LCD38 

LCD38 

4 

7 

8 

41 

10 

PTB6/LCD39 

LCD39 

5 

9 

10 

40 

9 

PTB7/LCD40 

LCD40 

6 

11  12 

39 

8 

PTB2/LCD31 

LCD31 

7 

13  14 

38 

7 

PTB3/LCD32 

LCD32 

8 

15  16 

37 

16 

PTD0/LCD0 

LCD00 

9 

17  18 

1 

15 

PTD1/LCD1 

LCD01 

10 

19  20 

2 

6 

PTD2/LCD2 

LCD02 

11 

21  22 

3 

5 

PTD3/LCD3 

LCD03 

12 

23  24 

4 

4 

PTD4/LCD4 

LCD04 

13 

25  26 

5 

3 

PTD5/LCD5 

LCD05 

14 

27  28 

6 

2 

PTD6/LCD6 

LCD06 

15 

29  30 

7 

1 

PTD7/LCD7 

LCD07 

16 

31  32 

8 

80 

PTE0/LCD8 

LCD08 

17 

33  34 

9 

79 

PTE1/LCD9 

LCD09 

18 

35  36 

10 

78 

PTE2/LCD10 

LCD10 

19 

37  38 

11 

77 

PTE3/LCD11 

LCD11 

20 

39  40 

12 

76 

PTE4/LCD12 

LCD12 

21 

41  42 

13 

75 

PTE5/LCD13 

LCD13 

22 

43  44 

14 

74 

PTG0/LCD33 

LCD33 

23 

45  46 

15 

73 

PTG1/LCD34 

LCD34 

24 

47  48 

16 

72 

PTG4/LCD41 

LCD41 

25 

49  50 

17 

71 

PTG5/LCD42 

LCD42 

26 

51  52 

18 

70 

PTG6/LCD43 

LCD43 

27 

53  54 

19 

66 

PTE6/LCD14 

LCD14 

28 

55  56 

20 

65 

PTE7/LCD15 

LCD15 

29 

57  58 

21 

64 

PTC0/LCD16 

LCD16 

30 

59  60 

22 

63 

PTC1/LCD17 

LCD17 

31 

61  62 

36 

62 

PTC2/LCD18 

LCD18 

32 

63  64 

35 

61 

PTC3/LCD19 

LCD19 

33 

65  66 

34 

60 

PTC4/LCD20 

LCD20 

34 

67  68 

33 

59 

PTA0/LCD21 

LCD21 

35 

69  70 

32 

58 

PTG2/LCD35 

LCD35 

36 

71  72 

31 

57 

PTG3/LCD36 

LCD36 

37 

73  74 

30 

56 

PTA1 /LCD22 

LCD22 

38 

75  76 

29 

55 

PTA2 /LC23 

LCD23 

39 

77  78 

28 

54 

PTA3 /LCD24 

LCD24 

40 

79  80 

27 

53 

PTA4 /LCD25 

LCD25 

41 

81  82 

26 

52 

PTA5 /LCD26 

LCD26 

42 

83  84 

25 

51 

PTA6 /LCD27 

LCD27 

43 

85  86 

24 

50 

PTA7 /LCD28 

LCD28 

44 

87  88 

23 

 

Summary of Contents for DEMO9S08LG32

Page 1: ...D O C 0 4 6 9 0 1 0 R E V D Web Site www axman com Support support axman com DEMO9S08LG32 Demonstration Board for Freescale MC9S08LG32 Microcontroller USER GUIDE ...

Page 2: ...ENT SUPPORT 7 INTEGRATED BDM 7 USB BDM OPTION HEADERS 7 BDM_PORT HEADER 7 POWER 8 POWER SELECT 8 PWR_SEL 8 VX_EN 9 RESET SWITCH 10 LOW VOLTAGE RESET 10 TIMING 10 COMMUNICATIONS 10 USB SERIAL LINK 10 RS 232 11 COM CONNECTOR 11 COM_SEL 11 LCD 12 CONTRAST 12 USER I O 13 BUZZER 13 POTENTIOMETER 14 USER LED S 14 PUSHBUTTON SWITCHES 15 MCU I O PORT 16 LCD ENABLE OPTION HEADER 17 ...

Page 3: ...ption Header 13 Figure 11 ADC Option Header 14 Figure 12 User1 Option Header 14 Figure 13 User2 Option Header 15 Figure 14 MCU I O PORT J1 16 Figure 15 LCD Enable Option Header JP1 18 REVISION Date Rev Comments November 21 2008 A Initial Release December 02 2008 B Updated DEMO9S08LG32 connector pins features MCU I O port and demonstration board diagram February 24 2009 C Minor updates to format an...

Page 4: ...o this product or modifying the products operation from the factory default as shipped may effect its performance and cause interference with nearby electronic equipment If such interference is detected suitable mitigating measures should be taken TERMINOLOGY This development module utilizes option select jumpers to configure default board operation Terminology for application of the option jumper...

Page 5: ...to MCU IO signals On board 5V regulator Optional Power from USB BDM or MCU_PORT connector Power Input Selection Jumpers Power input from USB BDM Power input from on board regulator Power input from Connector J1 Optional Power output through Connector J1 User Components Provided 10 Push Switches 8 User 1 Reset 1 IRQ 12 LED Indicators 8 User VDD IRQ USB and reset 5K ohm POT w LP Filter for ADC input...

Page 6: ...for the MC9S08LG32 immediately out of reset Refer to the MC9S08LG32 Data Sheet DS for further information Figure 1 Memory Map 0000 005F Direct Page Registers 0060 081F RAM 1980 Bytes 0820 085C LCD Registers 0860 17FF Unimplemented 1800 187A High Page Registers 187B 7FFF Unimplemented 8000 BFFF FLASH A C000 FFFF FLASH B SOFTWARE DEVELOPMENT Software development requires the use of a compiler or an ...

Page 7: ...he target board eliminating the need to power the board externally Power from the USB Multilink BDM is derived from the USB bus therefore total current consumption for the target board and connected circuitry must not exceed 500mA This current limit describes the current supplied by the USB cable to the BDM circuit the target board and any connected circuitry Excessive current drain will violate t...

Page 8: ...y power from connector J1 to external circuitry CAUTION Damage to the board may result if voltages greater than 5 5V are applied at the connector J1 input POWER SELECT Power may be applied to the board through the integrated USB Multilink BDM circuitry a 2 0mm barrel connector or through connector J1 Power selection is achieved using 2 selection headers the PWE_SEL option header and the VX_EN opti...

Page 9: ...eding 12V applied to VIN may damage the target board VX_EN The VX_EN option header is a 2 pin jumper that connects or disconnects input J1 1 directly to the target board voltage rail J1 3 connects directly to the target board ground plane Use of this feature requires a regulated input power source This power input is decoupled to minimize noise but is not regulated or protected Care should be exer...

Page 10: ...eaches an appropriate level The LVD also protect against under voltage conditions Consult the MC9S08LG32 reference manual for details LVD operation TIMING The DEMO9S08LG32 internal timing source is active from RESET by default An external 32 kHz XTAL oscillator configured for low power operation is also provided Refer to the MC9S08LG32 Reference Manual for details on configuring the selected timin...

Page 11: ... CONNECTOR PTI1 TMRCLK TX2 TXD J1 5 PTI0 RX2 RXD J1 7 COM Connector A standard 9 pin Dsub connector provides external connections for the SCI0 port The Dsub shell is connected to board ground through a ferrite bead The ferrite bead provides noise isolation on the RS 232 connection The figure below details the DB9 connector Figure 7 COM1 Connector 4 6 1 Female DB9 connector that interfaces to the M...

Page 12: ...located below the LCD module allows each LCD signal to be disconnected from the associated LCD input This allows multiplexed signal functionality to be used without affecting the LCD module The LCD Enable Option Header allows the user to disable any LCD signal to the LCD This allows any signal to be used for a multiplexed function with out affecting the LCD Figure 15 at the end of this document sh...

Page 13: ...egrated USB BDM CAUTION Voltage input at VIN greater than 12V may damage the target board USER I O User I O includes 2 potentiometer 8 push button switches and 8 green LEDs and 1 piezo buzzer for user I O The User1 User2 and Buz option header blocks enable or disable each User I O function individually Buzzer The DEMO9S08LG32 target board provides an externally modulated piezo buzzer for audible a...

Page 14: ...ing pushbuttons KBI5 or KBI6 in end user applications the option jumper at PTH0 and or PTH1 should be removed Pressing pushbutton KBI5 with option jumper installed at PTH0 or pressing pushbutton KBI6 with option jumper installed at PTH1 will cause a target board POR User LED s The DEMO9S08LG32 target board provides 8 green LEDs for output indication Each LED is configured for active low operation ...

Page 15: ...tton switches for user input Each push button switch is configured for active low operation No bias is applied to these push button inputs Use of target MCU internal pull ups is required for proper operation Figure 13 below shows the USER2 enable position and associated signal for each user switch Figure 13 User2 Option Header USER1 Signal ON OFF KBI1 PTH6 KBI1 Enabled Disabled KBI2 PTH7 KBI2 Enab...

Page 16: ...SPSCK 21 22 PTH0 KBI5 ADC6 PTI5 TPM2CH0 SCL SS 23 24 PTH1 KBI6 ADC7 PTF6 XTAL 25 26 PTA1 SCL LCD22 PTF7 EXTAL 27 28 PTA2 SDA ADC0 LC23 PTD0 LCD0 29 30 PTH3 KBI8 ADC9 PTD1 LCD1 31 32 PTF3 SS KBI1 TPM2CH5 PTD2 LCD2 33 34 PTF5 MOSI KBI3 TMP2CH3 PTD3 LCD3 35 36 PTF4 MISO KBI2 TPM2CH4 PTD4 LCD4 37 38 PTF1_out RX1 TPM1CH0 ADC13 PTD5 LCD5 39 40 PTF0 TX1 KBI4 TPM2CH2 ADC12 PTD6 LCD6 41 42 PTG0 LCD33 PTD7 ...

Page 17: ...ignal to the LCD This allows any signal to be used for a multiplexed function with out affecting the LCD Figure 15 below shows the relation between target MCU signals and LCD glass pins through the JP1 option header Installing a shunt at any position enables the LCD signal to the LCD Removing a shunt at any position disconnects the LCD signal from the LCD ...

Page 18: ...9 PTE1 LCD9 LCD09 18 35 36 10 78 PTE2 LCD10 LCD10 19 37 38 11 77 PTE3 LCD11 LCD11 20 39 40 12 76 PTE4 LCD12 LCD12 21 41 42 13 75 PTE5 LCD13 LCD13 22 43 44 14 74 PTG0 LCD33 LCD33 23 45 46 15 73 PTG1 LCD34 LCD34 24 47 48 16 72 PTG4 LCD41 LCD41 25 49 50 17 71 PTG5 LCD42 LCD42 26 51 52 18 70 PTG6 LCD43 LCD43 27 53 54 19 66 PTE6 LCD14 LCD14 28 55 56 20 65 PTE7 LCD15 LCD15 29 57 58 21 64 PTC0 LCD16 LCD1...

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