WARNING: The output stage may be damaged if triggered by an external signal at a
pulse repetition frequency greater than 20 kHz.
GATING MODES
Triggering can be suppressed by a TTL-level signal on the rear-panel GATE connector.
The instrument can be set to stop triggering when this input high or low, using the front-
panel gate menu or the appropriate programming commands. This input acts
synchronously. When gated, the output will complete the full pulse width if the output is
high, and then stop triggering. No pulses are truncated.
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Summary of Contents for AVIR-4D-B
Page 36: ...PCB 158R5 LOW VOLTAGE POWER SUPPLY...
Page 37: ...PCB 235C HIGH VOLTAGE DC POWER SUPPLY...
Page 38: ...PCB 216F PRF PW TR ADJUST...
Page 39: ...PCB 151D PULSE WIDTH RANGE CONTROL...
Page 40: ...PCB 104G KEYPAD DISPLAY BOARD...
Page 42: ...PERFORMANCE CHECKSHEET 42...