Avnet AES-LPA-502-G, User Manual

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Page 3
Differential Breakout card for Zynq Ult RFSoC
– Hardware User’s Guide
Hardware User’s Guide
1 Introduction
The AES-LPA-502-G is a daughter
card for the Xilinx Zynq® Ult™ RFSoC ZCU111 Evaluation Kit.
A completely passive board with no filtering or baluns, it is intended as a break-out for RF-ADCs and RF-
DACS of the Zynq Ult RFSoC device to external test equipment. AES-LPA-502-G provides access
to the 8 channels of RF-ADC and RF-DACS of the Zynq Ult RFSoC device on ZCU111 through
fully differential, 50-Ohm length-matched traces via two Samtec LPAM (8x40) connectors on the bottom of
the card.
1.1 Key Features

J333 LPAM-40-01.0-S-08-2-K-TR
– ADC

J888 LPAM-40-01.0-S-08-2-K-TR
– DAC

Eight DACs and eight ADCs routed to RF connectors

Four pairs external input clocks for ADCs routed to RF connectors

Two pair external input clocks for DACs routed to RF connectors

RFSoC bank 224-227 VCM nets routed to RF connectors

Access RFMC digital I/O (40 bits) at standard headers

Access to RFMC I2C, 1.8V, 3.3V, 12.0V and DAC_AVTT at standard headers

Leverages Samtec RSP-208784-01 screw-mount, straight SMA plug
1.2 Support
For additional documentation, related products, and videos visit the Avnet RFSoC kit page:
www.avnet.com/rfsockit
If you have questions, please use the Avnet RFSoC Kit forum on our Element 14 ZedBoard
Community page:
https://www.element14.com/zedboardcommunity