165
11054A–ATARM–27-Jul-11
SAM9X25
165
11054A–ATARM–27-Jul-11
SAM9X25
20. Slow Clock Controller (SCKC)
20.1
Description
The System Controller embeds a Slow Clock Controller.
The slow clock can be generated either by an external 32,768 Hz crystal oscillator or by the on-
chip 32 kHz RC oscillator. The 32,768 Hz crystal oscillator can be bypassed by setting the bit
OSC32BYP to accept an external slow clock on XIN32.
The internal 32 kHz RC oscillator and the 32,768 Hz oscillator can be enabled by setting to 1,
respectively, RCEN bit and OSC32EN bit in the System Controller user interface. The OSCSEL
command selects the slow clock source.
20.2
Embedded Characteristics
• 32 kHz RC Oscillator or 32,768 Hz Crystal Oscillator Selector
• VDDBU Powered
20.3
Block Diagram
Figure 20-1.
Block Diagram
RCEN, OSC32EN, OSCSEL and OSC32BYP bits are located in the Slow Clock Control Register
(SCKCR) located at address 0xFFFFFE50 in the backed up part of the System Controller and so
are preserved while VDDBU is present.
After a VDDBU power on reset, the default configuration is RCEN = 1, OSC32EN = 0 and
OSCSEL = 0, allowing the system to start on the internal 32 kHz RC oscillator.
The programmer controls the slow clock switching by software and so must take precautions
during the switching phase.
20.3.1
Switch from Internal 32 kHz RC Oscillator to 32,768 Hz Crystal Oscillator
To switch from the internal 32 kHz RC oscillator to the 32,768 Hz crystal oscillator, the program-
mer must execute the following sequence:
• Switch the master clock to a source different from slow clock (PLL or Main Oscillator) through
the Power Management Controller.
• Enable the 32,768 Hz oscillator by setting the bit OSC32EN to 1.
On Chip
RC OSC
Slow Clock
SLCK
XIN32
XOUT32
Slow Clock
Oscillator
OSC32EN
RCEN
OSCSEL
OSC32BYP
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