Atmel SAM4S Series, Preliminary Data Sheet

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11100B–ATARM–31-Jul-12
SAM4S Series [Preliminary]
Exception Return
An Exception return occurs when the processor is in Handler mode and executes one of the fol-
lowing instructions to load the EXC_RETURN value into the PC:
• an
LDM
or
POP
instruction that loads the PC
• an
LDR
instruction with the PC as the destination.
• a
BX
instruction using any register.
EXC_RETURN is the value loaded into the LR on exception entry. The exception mechanism
relies on this value to detect when the processor has completed an exception handler. The low-
est five bits of this value provide information on the return stack and processor mode.
Table 11-
10 shows the EXC_RETURN values with a description of the exception return behavior.
All EXC_RETURN values have bits[31:5] set to one. When this value is loaded into the PC, it
indicates to the processor that the exception is complete, and the processor initiates the appro-
priate exception return sequence.
11.4.3.8 Fault Handling
Faults are a subset of the exceptions, see “Exception Model” . The following generate a fault:
• a bus error on:
– an instruction fetch or vector table load
– a data access
• an internally-detected error such as an undefined instruction
• an attempt to execute an instruction from a memory region marked as Non-Executable (XN) .
• a privilege violation or an attempt to access an unmanaged region causing an MPU fault.
Fault Types
Table 11-11 shows the types of fault, the handler used for the fault, the corresponding fault sta-
tus register, and the register bit that indicates that the fault has occurred. See “Configurable
Fault Status Register” for more information about the fault status registers.
Table 11-10. Exception Return Behavior
EXC_RETURN[31:0] Description
0xFFFFFFF1
Return to Handler mode, exception return uses non-floating-point state
from the MSP and execution uses MSP after return.
0xFFFFFFF9
Return to Thread mode, exception return uses non-floating-point state from
MSP and execution uses MSP after return.
0xFFFFFFFD
Return to Thread mode, exception return uses non-floating-point state from
the PSP and execution uses PSP after return.
Table 11-11. Faults
Fault Handler Bit Name Fault Status Register
Bus error on a vector read
Hard fault
VECTTBL
“Hard Fault Status Register”
Fault escalated to a hard fault FORCED