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11100B–ATARM–31-Jul-12
SAM4S Series [Preliminary]
11.4.1.17
Exceptions and Interrupts
The Cortex-M4 processor supports interrupts and system exceptions. The processor and the
Nested Vectored Interrupt Controller (NVIC) prioritize and handle all exceptions. An exception
changes the normal flow of software control. The processor uses the Handler mode to handle all
exceptions except for reset. See
and
for more
information.
The NVIC registers control interrupt handling. See
“Nested Vectored Interrupt Controller (NVIC)”
for more information.
11.4.1.18
Data Types
The processor supports the following data types:
• 32-bit words
• 16-bit halfwords
• 8-bit bytes
• The processor manages all data memory accesses as little-endian. Instruction memory and
Private Peripheral Bus (PPB) accesses are always little-endian. See
for more information.
11.4.1.19
Cortex Microcontroller Software Interface Standard (CMSIS)
For a Cortex-M4 microcontroller system, the Cortex Microcontroller Software Interface Standard
(CMSIS) defines:
• a common way to:
– access peripheral registers
– define exception vectors
• the names of:
– the registers of the core peripherals
– the core exception vectors
• a device-independent interface for RTOS kernels, including a debug channel.
The CMSIS includes address definitions and data structures for the core peripherals in the Cor-
tex-M4 processor.
The CMSIS simplifies the software development by enabling the reuse of template code and the
combination of CMSIS-compliant software components from various middleware vendors. Soft-
ware vendors can expand the CMSIS to include their peripheral definitions and access functions
for those peripherals.
This document includes the register names defined by the CMSIS, and gives short descriptions
of the CMSIS functions that address the processor core and the core peripherals.
Note:
This document uses the register short names defined by the CMSIS. In a few cases, these differ
from the architectural short names that might be used in other documents.
The following sections give more information about the CMSIS:
•
Section 11.5.3 ”Power Management Programming Hints”
•
Section 11.6.2 ”CMSIS Functions”
•
Section 11.8.2.1 ”NVIC Programming Hints”
.
Summary of Contents for SAM4S Series
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