Atmel SAM4S-EK User Manual Download Page 42

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SOCKET_THROUGHT_HOLE

NOT POPULATED

DNP

LQFP100

PB2

PB3

PB10

PB11

PB4
PB6
PB7
PB5

NRST

PB1

PA0
PA1
PA2
PA3
PA4
PA5
PA6

PA9
PA10
PA11
PA12
PA13
PA14
PA15
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
PA26
PA27
PA28
PA29
PA30
PA31

PC0

PC1

PC2

PC3

PC4

PC5

PC6

PC7

PC8

PC9

PC10

PC11

PC12

PC13

PC14

PC15

PC16

PC17

PC18

PC19

PC20

PC21

PC22

PC23

PC24

PC25

PC26

PC27

PC28

PC29

PC30

PC31

XOUT32

PB0

JTAGSEL

XIN32

PB14

PC12

PA23

PC23
PB11

PC24

PC22

PB12

PB10

PA19

PC15

PC13

PA22

PC18
JTAGSEL
PB5

PC20

PB6

PC19

PC21
PB7

PA18

PA21

PC26

PA17

PC27

PB3

PB2

PC31

PB0

ADVREF

PC29

PC30

PB1

PA25
PA26
PC3

PA24

PC4

PC5

PA12

XIN32

XOUT32

PC2

PA11

PA9
PC1

PA10

PA16
PC7

PC6

PA14

PA15

PA13

PC28

PA5

PA4

PA27

PC8

NRST

PA28

PA30

PA3

PC10

PA29

TEST

PC9

PC16

PC11

PA2

PC14

PA1

PA0

PC17

PB4

PA6

PC0

XIN

PA20

PC25
PB13

XOUT

PA31

PB0

PB6
PB7

PB9

PB8

PB10
PB11

PB1
PB2

PB12

PB3

PB14

PB13

PB4
PB5

PB13

PB14

PB12

ADVREF

TEST

XIN32
XOUT32

PA7
PA8

XIN

XOUT

PB8

PB9

PB13

PB14

VDDCORE

DGND

VDDIO

DGND

VDDPLL

VDDCORE

DGND

VDDIN

VDDOUT

DGND

VDDOUT

VDDIN

VDDIO

VDDCORE

VDDIO

VDDCORE

VDDIO

VDDCORE

VDDIO

VDDPLL

DGND

VDDOUT

DGND

VDDPLL

VDDCORE

VDDIO

VDDIN

+3V3

DGND

+3V3

DGND

VCC33

+5V

DGND

PB2

PB3

PB10

PB11

PB5

PB7

PB6

PB4

NRST

PB1

PA[0..31]

PC[0..31]

PB[0..14]

PB0

REV

DATE

MODIF.

DES.

DATE

VER.

SCALE

1/1

REV.

SHEET

This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.

INIT EDIT

XX-XXX-XX

XXX

Microcontroller

08-Mar-11

SAM4S-EK

REV

DATE

MODIF.

DES.

DATE

VER.

SCALE

1/1

REV.

SHEET

This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.

INIT EDIT

XX-XXX-XX

XXX

Microcontroller

08-Mar-11

SAM4S-EK

REV

DATE

MODIF.

DES.

DATE

VER.

SCALE

1/1

REV.

SHEET

This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.

INIT EDIT

XX-XXX-XX

XXX

Microcontroller

08-Mar-11

SAM4S-EK

TP3

0R nm

.7uF

TP1

0R nm

100nF

R107
0R

100nF

C24
10uF

JP3

0R nm

JP5

Header2

JP5

Header2

10uH-100mA

C3
20pF

100nF

R14
1R

C4
20pF

JP1
Header2 nm

.7uF

100nF

R2
49.9R 1%

JP7

Header2

JP7

Header2

0R nm

JP2

100nF

C70
4.7uF

100nF

0R nm

100nF

TP2

TP4

J2
Socket-QFP100 nm

26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50

100

C23
4.7uF

AT91SAM4S-LQFP100

MN1
AT91SAM4S-LQFP100

AT91SAM4S-LQFP100

MN1
AT91SAM4S-LQFP100

PA0_PWMH0_TIOA0_A17

PA1_PWMH1_TIOB0_A18

PA2_PWMH2_SCK0_DATRG

PA3_TWD0_NPCS3

PA4_TWCK0_TCLK0

PA5_RXD0_NPCS3

PA6_TXD0_PCKO

PA7_RTS0_PWMH3

PA8_CTS0_AD12BTRG

PA9_URXD0_NPCS1

PA10_UTXD0_NPCS2

PA11_NPCS0_PWMH0

PA12_MISO_PWMH1

PA13_MOSI_PWMH2

PA14_SPCK_PWMH3

PA15_TF_TIOA1_PWML3

PA16_TK_TIOB1_PWML2

PA17_TD_PCK1_PWMH3_AD12B0

PA18_RD_PCK2_A14_AD12B1

PA19_RK_PWML0_A15_AD12B2

PA20_RF_PWML1_A16_AD12B3

PA21_RXD1_PCK1_AD12B8

PA22_TXD1_NPCS3_NCS2_AD12B9

PA23_SCK1_PWMH0_A19

DDCORE

JTAGSEL

GND

DDI

PB8_XOUT

PB9_XIN

PB0_PWMH0_AD12B4

NRST

DDCORE

ADVREF

PA25_CTS1_PWMH2_A23

PA24_RTS1_PWMH1_A20

PB2_URXD1_NPCS2_AD12B6

PB3_UTXD1_PCK2_AD12B7

PB6_TMS_SWDIO

PB4_TWD1_PWMH2_TDI

PB5_TWCK1_PWML0_TDO

PB7_TCK_SWCLK

TEST

PB12_PWML1_ERASE

PB14_NPCS1_PWMH3_DACO1

DDOUT

PB1_PWMH1_AD12B5

PA26_DCD1_TIOA2_MCDA2

PA27_DTR1_TIOB2_MCDA3

PA28_DSR1_TCLK1_MCCDA

PA29_RI1_TCLK2_MCCK

PA30_PWML2_NPCS2_MCDA0

PA31_NPCS1_PCK2_MCDA1

DDI

PB10_DDM

PB11_DDP

PB13_PWML2_PCK0_DACO0

DDI

DDCORE

DDP

100

DDI

GNDANA

0_D0_P

WML0

1_D1_P

WML1

2_D2_P

WML2

3_D3_P

WML3

4_D4_NP

5_D5

6_D6

7_D7

8_NWR0_NWE

9_NA

NDOE

10_NA

NDWE

11_NRD

12_NCS

3_A

D12B

13_NWA

WML0_A

D12B

14_NCS

15_NCS

WML1_A

D12B

16_A

21_NA

NDA

17_A

22_NA

NDCLE

18_A

0_NB

0_P

WMH0

19_A

1_P

WMH1

20_A

2_P

WMH2

21_A

3_P

WMH3

22_A

4_P

WML3

23_A

5_TI

24_A

6_TI

25_A

7_TCLK

26_A

8_TI

27_A

9_TI

28_A

10_TCLK

29_A

11_TI

5_A

D12B

30_A

12_TI

5_A

D12B

31_A

13_TCLK

5_A

D12B

100nF

2.2uF

12MHz

C22
100nF

100nF

.7uF nm

R11
0R

100nF

JP8

Header2

JP8

Header2

20pF

J1
SMA nm

3
5

R12

JP4

Header2 nm

JP4

Header2 nm

R13
2.2K

Y3
32.768KHz

R10

0R nm

R10

0R nm

JP6

Header2

JP6

Header2

100nF

MN2

LM4040AIM3X-3.0

MN2

LM4040AIM3X-3.0

20pF

Summary of Contents for SAM4S-EK

Page 1: ...11139A ATARM 29 Nov 11 SAM4S EK Development Board User Guide...

Page 2: ...1 2 SAM4S EK Development Board User Guide 11139A ATARM 29 Nov 11...

Page 3: ...on Kit Hardware 4 1 4 1 Board Overview 4 1 4 2 Features List 4 2 4 3 Function Blocks 4 2 4 3 1 Processor 4 2 4 3 2 Memory 4 2 4 3 3 Clock Circuitry 4 3 4 3 4 Reset Circuitry 4 4 4 3 5 Power Supply and...

Page 4: ...ake Support 4 22 4 5 3 UART Connector J7 4 23 4 5 4 USB Device Connector J15 4 23 4 5 5 TFT LCD Connector J8 4 24 4 5 6 JTAG Debugging Connector J6 4 25 4 5 7 SD MMC MCI Connector J3 4 26 4 5 8 Analog...

Page 5: ...nts acronyms and abbreviations Section 2 describes the kit contents its main features and specifications Section 3 provides board specifications Section 4 describes the development environment Section...

Page 6: ...the following items Board a SAM4S EK board a universal input AC DC power supply with US Europe and UK plug adapters Cables one USB cable one serial RS232 cable A Welcome Letter Figure 2 1 Unpacked SA...

Page 7: ...arning The SAM4S EK board is shipped in a protective anti static package The board must not be subjected to high electrostatic potentials A grounding strap or similar protective device should be worn...

Page 8: ...nnector to the board and plug the power supply to an AC power plug The board LCD should light up and display a welcome page Then click or touch icons displayed on the screen and enjoy the demo 3 2 Sam...

Page 9: ...duces system level concepts such as power distribution memory and interface assignments The SAM4S EK board is based on the integration of an ARM Cortex M3 processor with on board NAND Flash and a set...

Page 10: ...reo headphone jack output SD MMC interface Reset button NRST User buttons Left and Right QTouch buttons Up Down Left Right Valid and Slider Full Speed USB device port JTAG ICE port On board power regu...

Page 11: ...with one 12 MHz crystal optional Piezoelectric Ceramic Resonator 12 Mhz Murata ref CSTCE12M0G15L99 R0 one 32 768 Hz crystal and an external clock input con nector optional not populated by default Fig...

Page 12: ...ices datasheets about reset duration requirements Then you need to set an appropriate configuration in the NRST Manager This is done through the ERSTL field in the RSTC_MR register The NRST duration i...

Page 13: ...ransmitter USART provides one full duplex uni versal synchronous asynchronous serial link The data frame format is extensively configurable data length parity number of stop bits to support a broad ra...

Page 14: ...PIO line is available for other custom usage The SAM4S communicates with the LCD through PIOC where an 8 bit parallel 8080 like protocol data bus has to be implemented by software USART RXD1 TXD1 RTS1...

Page 15: ..._DB5 LCD_DB4 LCD_DB3 LCD_DB2 LCD_DB1 LCD_DB0 LCD_DB0 LCD_DB4 LCD_DB9 LCD_DB5 LCD_DB7 LCD_DB6 LCD_DB8 LCD_DB1 LCD_DB3 LCD_DB2 PC23 PC22 DGND DGND 3V3 DGND 3V3 DGND DGND DGND DGND DGND DGND DGND DGND NR...

Page 16: ...fer to the Schematics section Touch ADC auxiliary inputs IN3 IN4 of the ADS7843 are connected to test point TP8 TP9 for optional function extension Figure 4 10 Touch Panel Control 4 3 14 JTAG ICE A st...

Page 17: ...values 20 dB default setting both JP14 and JP15 are off 26 dB both JP14 and JP15 are on Note 3 The TB1 series 0 Ohm resistor is a reservation for future impedance adaptation facility Under specific a...

Page 18: ...Header2 R76 47K R76 47K R93 100K R93 100K R91 0R R91 0R JP15 Header2 JP15 Header2 C69 1nF C69 1nF R86 47K R86 47K R82 1K R82 1K C68 1uF C68 1uF MIC1 SVB6050 MIC1 SVB6050 1 2 R81 100R R81 100R FB2 BN0...

Page 19: ...R114 and R116 build up a 90 Ohm differential impedance together with the embedded 6 Ohm output impedance of the SAM4S full speed channel drivers R110 and R112 build up a divider bridge from VBUS 5V to...

Page 20: ...rt PB14 and provides an external analog output An on board 50 Ohm resistor termination can be enabled by closing jumper JP21 A filter can be imple mented on this output channel by replacing R106 and C...

Page 21: ...re connected to PIO lines and defined to be left and right buttons by default In addition a mechanical button controls the system reset signal NRST Figure 4 20 System Buttons QTOUCH PC25 PC24 PC31 PC3...

Page 22: ...terface which is connected to a 4 bit SD MMC micro card slot featuring a card detection switch Figure 4 22 SD Card 4 3 23 ZigBEE SAM4S has a 10 pin male connector for the RZ600 ZigBEE module Note 0 Oh...

Page 23: ...0 0R R120 0R J16 J16 1 2 3 4 5 6 7 8 9 10 R119 0R R119 0R R118 0R R118 0R JP27 JP27 R121 0R R121 0R C96 2 2nF C96 2 2nF C97 2 2uF C97 2 2uF PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13...

Page 24: ...z 9 PA8 CTS0 AD12BTR G WKUP5 XOUT32 CLK32KHz 10 PA9 URXD0 NPCS1 PWMFI0 WKUP6 UART receive data 11 PA10 UTXD0 NPCS2 UART transmit data 12 PA11 NPCS0 PWMH0 WKUP7 NPCS0 TSC 13 PA12 MISO PWMH1 MISO_TSC Zi...

Page 25: ...signments and Signal Descriptions No I O Line Peripheral A Peripheral B Peripheral C Extra Function System Function Comment 1 PB0 PWMH0 AD4 Microphone input 2 PB1 PWMH1 AD5 Analog input 3 PB2 URXD1 NP...

Page 26: ...button 2 14 PC13 NWAIT PWML0 AD10 LCD backlight control 15 PC14 NCS0 NAND Flash chip select 16 PC15 NCS1 PWML1 AD11 TFT LCD chip select 17 PC16 A21 NANDALE NAND Flash ALE 18 PC17 A22 NANDCLE NAND Fla...

Page 27: ...l impedance for RS485 interface JP11 RS485 CLOSE Maintain impedance matching for RS485 interface JP12 RS485 OPEN Maintain differential impedance for RS485 interface JP13 CS CLOSE NCS1 chip select LCD...

Page 28: ...ansion connectors for example This feature gives the user an added level of versatility for prototyping a system of his own See the table below Table 4 5 Audio Input Configuration JP17 JP19 MONO STERE...

Page 29: ...0R R2OUT MN5 R59 0R LCD backlight LED anode R66 0R PA11 R67 0R PA5 R68 0R PC13 R69 0R PA4 R70 0R Vref TSC R118 0R PA3 ZB_RSTN R119 0R PA5 IRQ1_ZBEE R120 0R PA4 IRQ0_ZBEE R121 0R PA6 SLP_TR Table 4 9 D...

Page 30: ...6 Male RS232 USART Connector J5 D1 Optional ESD protection for LCD touch panel R61 R63 RA2 RA3 Optional data bus termination for LCD controller JP4 Test mode selection for the SAM chip J2 Optional QFP...

Page 31: ...ignal 3 RXD RECEIVED DATA RS232 serial data input signal 5 GND GROUND 7 RTS READY TO SEND Active positive RS232 input signal 8 CTS CLEAR TO SEND Active positive RS232 output signal Table 4 12 Male RS2...

Page 32: ...ptions Pin Mnemonic Pin Mnemonic 1 3V3 2 LCD_DB17 PC7 3 LCD_DB16 PC6 4 LCD_DB15 PC5 5 LCD_DB14 PC4 6 LCD_DB13 PC3 7 LCD_DB12 PC2 8 LCD_DB11 PC1 9 LCD_DB10 PC0 10 LCD_DB09 NC 11 LCD_DB08 NC 12 LCD_DB07...

Page 33: ...re is no connection 4 GND Common ground 5 TDI TEST DATA INPUT Serial data output line sampled on the rising edge of the TCK signal JTAG data input of target CPU It is recommended that this pin is pull...

Page 34: ...ignal 16 GND Common ground 17 RFU This pin is not connected in SAM ICE 18 GND Common ground 19 RFU This pin is not connected in SAM ICE 20 GND Common ground Table 4 15 JTAG ICE Connector J13 Signal De...

Page 35: ...ut CN2 Bottom View 4 5 9 RS485 Connector J14 Figure 4 32 RS485 Connector J14 Table 4 17 Analog Input Output Connector CN1 CN2 Signal Descriptions Pin Mnemonic 1 2 3 4 GND 5 Analog input PB1 for CN1 an...

Page 36: ...Table 4 20 Connector J16 Signal Descriptions Function Signal Name Port Pin Pin Port Signal Name Function Option on Misc Port Set by Zero Ohm Resistor or Solder Shunts Reset RST 1 2 Misc EEPROM for MA...

Page 37: ...tor J12 Table 4 21 Connector J12 Signal Descriptions Pin Mnemonic Pin Mnemonic 1 5V or 3v3 2 5V or 3v3 3 GND 4 GND 5 PC0 6 PC16 7 PC1 8 PC17 9 PC2 10 PC18 11 PC3 12 PC19 13 PC4 14 PC20 15 PC5 16 PC21...

Page 38: ...Table 4 22 Connector J13 Signal Descriptions Pin Mnemonic Pin Mnemonic 1 5V or 3v3 2 5V or 3v3 3 GND 4 GND 5 NC 6 PA16 7 NC 8 PA17 9 NC 10 PA18 11 NC 12 PA19 13 NC 14 PA20 15 NC 16 PA21 17 PA6 18 PA2...

Page 39: ...139A ATARM 29 Nov 11 Section 5 Schematics 5 1 Schematics This section contains the following schematics Block diagram General information Microcontroller NAND Flash serial interface TFT LCD Touch Audi...

Page 40: ...s agreement is our property Reproduction and publication without our written authorization shall expose offender to legal proceedings INIT EDIT A 1 7 A XX XXX XX JH XXX Block Diagram 08 Mar 11 SAM4S E...

Page 41: ...DWN_SNSK TLEFT_SNS TLEFT_SNSK TRIGHT_SNS TRIGHT_SNSK PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13 PC14 PC15 PIOC USAGE PC16 PC17 PC18 PC19 PC20 PC21 PC22 PC23 PC24 PC25 PC27 PC28 PC29 P...

Page 42: ...nF C18 100nF C70 4 7uF C70 4 7uF C11 100nF C11 100nF R7 0R nm R7 0R nm C17 100nF C17 100nF TP2 TP2 TP4 TP4 J2 Socket QFP100 nm J2 Socket QFP100 nm 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21...

Page 43: ...48 JP28 Header2 nm JP28 Header2 nm R43 100K R43 100K C39 100nF C39 100nF R41 100K R41 100K C40 100nF C40 100nF MN4 ADM3485ARZ MN4 ADM3485ARZ RO 1 RE 2 DE 3 DI 4 VCC 8 GND 5 A 6 B 7 TP5 TP5 C25 10uF C2...

Page 44: ...ings INIT EDIT A 5 7 A XX XXX XX JH XXX TFT LCD QTouch 08 Mar 11 SAM4S EK R53 1K R53 1K R70 0R R70 0R R62 100K R62 100K D1 PACDN044Y5R nm TVS SOT23 5 D1 PACDN044Y5R nm TVS SOT23 5 1 2 3 4 5 R66 0R R66...

Page 45: ...R95 1K MN14 MIC5219 3 3YMM MN14 MIC5219 3 3YMM IN 2 EN 1 BYP 4 GND 5 GND 6 GND 7 GND 8 OUT 3 R77 470R R77 470R MN10 BNX002 01 MN10 BNX002 01 SV 1 SG 2 CV 3 CG1 4 CG2 5 CG3 6 C71 22nF C71 22nF R83 0R R...

Page 46: ...A XX XXX XX JH XXX User IF ZigBee 08 Mar 11 SAM4S EK REV DATE MODIF DES DATE VER SCALE 1 1 REV SHEET This agreement is our property Reproduction and publication without our written authorization shal...

Page 47: ...d clear GPNVM bit 1 and thereby selects the boot from the ROM by default The MCU will boot from the internal ROM to enable a SAM BA connection through the UART Connect the SAM4S EK UART port J3 to a P...

Page 48: ...SAM4S EK Development Board User Guide 7 1 11139A ATARM 29 Nov 11 Section 7 Revision History 7 1 Revision History Table 7 1 Document Comments Change Request Ref 11139A Initial version...

Page 49: ...RRANTY OF MERCHANTABILITY FITNESS FOR A PARTICULAR PURPOSE OR NON INFRINGEMENT IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT INDIRECT CONSEQUENTIAL PUNITIVE SPECIAL OR INCIDEN TAL DAMAGES INCLUDING...

Page 50: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information Atmel ATSAM4S EK...

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