262
8210C–AVR–09/11
Atmel AVR XMEGA D
• Bit 7:0 – CAL[7:0]: ADC Calibration value
These are the eight lsbs of the 12-bit CAL value.
21.14.9
CALH – Calibration Value register
• Bit 3:0 – CAL[11:8]: Calibration value
These are the four msbs of the 12-bit CAL value.
21.14.10 CH0RESH – Channel 0Result Register High
The CH0RESL and CH0RESH register pair represents the 16-bit value, CH0RES. For details on
reading 16-bit registers, refer to
”Accessing 16-bit Registers” on page 11
.
21.14.10.1
12-bit Mode, Left Adjusted
• Bit 7:0 – CHRES[11:4]: Channel Result High
These are the eight msbs of the 12-bit ADC result.
21.14.10.2
12-bit Mode, Right Adjusted
• Bit 7:4 – Reserved
These bits will in practice be the extension of the sign bit, CHRES11, when the ADC works in dif-
ferential mode, and set to zero when the ADC works in signed mode.
• Bit 3:0 – CHRES[11:8]: Channel Result High
These are the four msbs of the 12-bit ADC result.
21.14.10.3
8-bit Mode
• Bit 7:0 – Reserved
These bits will in practice be the extension of the sign bit, CHRES7, when the ADC works in
signed mode, and set to zero when the ADC works in single-ended mode.
Bit
7
6
5
4
3
2
1
0
–
–
–
–
CAL[11:8]
CALH
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
12-bit, left
CHRES[11:4]
12-bit, right
–
–
–
–
CHRES[11:8]
8-bit
–
–
–
–
–
–
–
–
Read/Write
R
R
R
R
R
R
R
R
Initial Value
0
0
0
0
0
0
0
0