181
8331B–AVR–03/12
Atmel AVR XMEGA AU
Figure 14-17.
Port override for timer/counter 0 and 1.
14.9
Interrupts and events
The timer/counter can generate both interrupts and events. The counter can generate an inter-
rupt on overflow/underflow, and each CC channel has a separate interrupt that is used for
compare or capture. In addition, an error interrupt can be generated if any of the CC channels is
used for capture and a buffer overflow condition occurs on a capture channel.
Events will be generated for all conditions that can generate interrupts. For details on event gen-
eration and available events, refer to
14.10 DMA Support
The interrupt flags can be used to trigger DMA transactions.
lists the
transfer triggers available from the timer/counter and the DMA action that will clear the transfer
trigger. For more details on using DMA, refer to
”DMAC - Direct Memory Access Controller” on
14.11 Timer/Counter Commands
A set of commands can be given to the timer/counter by software to immediately change the
state of the module. These commands give direct control of the UPDATE, RESTART, and
RESET signals.
An update command has the same effect as when an update condition occurs. The update com-
mand is ignored if the lock update bit is set.
The software can force a restart of the current waveform period by issuing a restart command. In
this case the counter, direction, and all compare outputs are set to zero.
A reset command will set all timer/counter registers to their initial values. A reset can be given
only when the timer/counter is not running (OFF).
OUT
CCExEN
INVEN
OCx
Waveform
Table 14-2.
DMA request sources.
Request
Acknowledge
Comment
OVFIF/UNFIF
DMA controller writes to CNT
DMA controller writes to PER
DMA controller writes to PERBUF
ERRIF
N/A
CCxIF
DMA controller access of CCx
DMA controller access of CCxBUF
Input capture operation
Output compare operation
