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Atmel AVR ATmega168PA, Specification Sheet

The Atmel AVR ATmega168PA is a versatile microcontroller designed for various applications. For a comprehensive understanding of its features and capabilities, you can easily access the detailed Specification Sheet and user manual, available for free download from manualshive.com. Explore the immense potential of this product with our informative resources.

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8

8161DS–AVR–10/09

ATmega48PA/88PA/168PA/328P

5.

Register Summary

Address

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Page

(0xFF)

Reserved

–

–

–

–

–

–

–

–

(0xFE)

Reserved

–

–

–

–

–

–

–

–

(0xFD)

Reserved

–

–

–

–

–

–

–

–

(0xFC)

Reserved

–

–

–

–

–

–

–

–

(0xFB)

Reserved

–

–

–

–

–

–

–

–

(0xFA)

Reserved

–

–

–

–

–

–

–

–

(0xF9)

Reserved

–

–

–

–

–

–

–

–

(0xF8)

Reserved

–

–

–

–

–

–

–

–

(0xF7)

Reserved

–

–

–

–

–

–

–

–

(0xF6)

Reserved

–

–

–

–

–

–

–

–

(0xF5)

Reserved

–

–

–

–

–

–

–

–

(0xF4)

Reserved

–

–

–

–

–

–

–

–

(0xF3)

Reserved

–

–

–

–

–

–

–

–

(0xF2)

Reserved

–

–

–

–

–

–

–

–

(0xF1)

Reserved

–

–

–

–

–

–

–

–

(0xF0)

Reserved

–

–

–

–

–

–

–

–

(0xEF)

Reserved

–

–

–

–

–

–

–

–

(0xEE)

Reserved

–

–

–

–

–

–

–

–

(0xED)

Reserved

–

–

–

–

–

–

–

–

(0xEC)

Reserved

–

–

–

–

–

–

–

–

(0xEB)

Reserved

–

–

–

–

–

–

–

–

(0xEA)

Reserved

–

–

–

–

–

–

–

–

(0xE9)

Reserved

–

–

–

–

–

–

–

–

(0xE8)

Reserved

–

–

–

–

–

–

–

–

(0xE7)

Reserved

–

–

–

–

–

–

–

–

(0xE6)

Reserved

–

–

–

–

–

–

–

–

(0xE5)

Reserved

–

–

–

–

–

–

–

–

(0xE4)

Reserved

–

–

–

–

–

–

–

–

(0xE3)

Reserved

–

–

–

–

–

–

–

–

(0xE2)

Reserved

–

–

–

–

–

–

–

–

(0xE1)

Reserved

–

–

–

–

–

–

–

–

(0xE0)

Reserved

–

–

–

–

–

–

–

–

(0xDF)

Reserved

–

–

–

–

–

–

–

–

(0xDE)

Reserved

–

–

–

–

–

–

–

–

(0xDD)

Reserved

–

–

–

–

–

–

–

–

(0xDC)

Reserved

–

–

–

–

–

–

–

–

(0xDB)

Reserved

–

–

–

–

–

–

–

–

(0xDA)

Reserved

–

–

–

–

–

–

–

–

(0xD9)

Reserved

–

–

–

–

–

–

–

–

(0xD8)

Reserved

–

–

–

–

–

–

–

–

(0xD7)

Reserved

–

–

–

–

–

–

–

–

(0xD6)

Reserved

–

–

–

–

–

–

–

–

(0xD5)

Reserved

–

–

–

–

–

–

–

–

(0xD4)

Reserved

–

–

–

–

–

–

–

–

(0xD3)

Reserved

–

–

–

–

–

–

–

–

(0xD2)

Reserved

–

–

–

–

–

–

–

–

(0xD1)

Reserved

–

–

–

–

–

–

–

–

(0xD0)

Reserved

–

–

–

–

–

–

–

–

(0xCF)

Reserved

–

–

–

–

–

–

–

–

(0xCE)

Reserved

–

–

–

–

–

–

–

–

(0xCD)

Reserved

–

–

–

–

–

–

–

–

(0xCC)

Reserved

–

–

–

–

–

–

–

–

(0xCB)

Reserved

–

–

–

–

–

–

–

–

(0xCA)

Reserved

–

–

–

–

–

–

–

–

(0xC9)

Reserved

–

–

–

–

–

–

–

–

(0xC8)

Reserved

–

–

–

–

–

–

–

–

(0xC7)

Reserved

–

–

–

–

–

–

–

–

(0xC6)

UDR0

 USART I/O Data Register

189

(0xC5)

UBRR0H

USART Baud Rate Register High

193

(0xC4)

UBRR0L

 USART Baud Rate Register Low

193

(0xC3)

Reserved

–

–

–

–

–

–

–

–

(0xC2)

UCSR0C

UMSEL01

UMSEL00

UPM01

UPM00

USBS0

UCSZ01 /UDORD0

UCSZ00 / UCPHA0

UCPOL0

191/206

Summary of Contents for AVR ATmega168PA

Page 1: ...eparate Oscillator Six PWM Channels 8 channel 10 bit ADC in TQFP and QFN MLF package Temperature Measurement 6 channel 10 bit ADC in PDIP Package Temperature Measurement Programmable Serial USART Master Slave SPI Serial Interface Byte oriented 2 wire Serial Interface Philips I2 C compatible Programmable Watchdog Timer with Separate On chip Oscillator On chip Analog Comparator Interrupt and Wake up...

Page 2: ...GND AREF AVCC PB5 SCK PCINT5 PB4 MISO PCINT4 PB3 MOSI OC2A PCINT3 PB2 SS OC1B PCINT2 PB1 OC1A PCINT1 PDIP 1 2 3 4 5 6 7 8 24 23 22 21 20 19 18 17 32 31 30 29 28 27 26 25 9 10 11 12 13 14 15 16 32 MLF Top View PCINT19 OC2B INT1 PD3 PCINT20 XCK T0 PD4 GND VCC GND VCC PCINT6 XTAL1 TOSC1 PB6 PCINT7 XTAL2 TOSC2 PB7 PC1 ADC1 PCINT9 PC0 ADC0 PCINT8 ADC7 GND AREF ADC6 AVCC PB5 SCK PCINT5 PCINT21 OC0B T1 P...

Page 3: ... directional I O port with internal pull up resistors selected for each bit The PC5 0 output buffers have symmetrical drive characteristics with both high sink and source capability As inputs Port C pins that are externally pulled low will source current if the pull up resistors are activated The Port C pins are tri stated when a reset condition becomes active even if the clock is not running 1 1 ...

Page 4: ...rnally connected to VCC even if the ADC is not used If the ADC is used it should be connected to VCC through a low pass filter Note that PC6 4 use digital supply voltage VCC 1 1 8 AREF AREF is the analog reference pin for the A D Converter 1 1 9 ADC7 6 TQFP and QFN MLF Package Only In the TQFP and QFN MLF package ADC7 6 serve as analog inputs to the A D converter These pins are powered from the an...

Page 5: ...Diagram The AVR core combines a rich instruction set with 32 general purpose working registers All the 32 registers are directly connected to the Arithmetic Logic Unit ALU allowing two independent registers to be accessed in one single instruction executed in one clock cycle The resulting PORT C 7 PORT B 8 PORT D 8 USART 0 8bit T C 2 16bit T C 1 8bit T C 0 A D Conv Internal Bandgap Analog Comp SPI...

Page 6: ...gram memory to be reprogrammed In System through an SPI serial interface by a conventional non volatile memory programmer or by an On chip Boot pro gram running on the AVR core The Boot program can use any interface to download the application program in the Application Flash memory Software in the Boot Flash section will continue to run while the Application Flash section is updated providing tru...

Page 7: ... development tools application notes and datasheets are available for download on http www atmel com avr Note 1 4 Data Retention Reliability Qualification results show that the projected data retention failure rate is much less than 1 PPM over 20 years at 85 C or 100 years at 25 C ...

Page 8: ...d 0xE6 Reserved 0xE5 Reserved 0xE4 Reserved 0xE3 Reserved 0xE2 Reserved 0xE1 Reserved 0xE0 Reserved 0xDF Reserved 0xDE Reserved 0xDD Reserved 0xDC Reserved 0xDB Reserved 0xDA Reserved 0xD9 Reserved 0xD8 Reserved 0xD7 Reserved 0xD6 Reserved 0xD5 Reserved 0xD4 Reserved 0xD3 Reserved 0xD2 Reserved 0xD1 Reserved 0xD0 Reserved 0xCF Reserved 0xCE Reserved 0xCD Reserved 0xCC Reserved 0xCB Reserved 0xCA R...

Page 9: ...ved 0xA9 Reserved 0xA8 Reserved 0xA7 Reserved 0xA6 Reserved 0xA5 Reserved 0xA4 Reserved 0xA3 Reserved 0xA2 Reserved 0xA1 Reserved 0xA0 Reserved 0x9F Reserved 0x9E Reserved 0x9D Reserved 0x9C Reserved 0x9B Reserved 0x9A Reserved 0x99 Reserved 0x98 Reserved 0x97 Reserved 0x96 Reserved 0x95 Reserved 0x94 Reserved 0x93 Reserved 0x92 Reserved 0x91 Reserved 0x90 Reserved 0x8F Reserved 0x8E Reserved 0x8D...

Page 10: ... Z C 9 0x3E 0x5E SPH SP10 5 SP9 SP8 12 0x3D 0x5D SPL SP7 SP6 SP5 SP4 SP3 SP2 SP1 SP0 12 0x3C 0x5C Reserved 0x3B 0x5B Reserved 0x3A 0x5A Reserved 0x39 0x59 Reserved 0x38 0x58 Reserved 0x37 0x57 SPMCSR SPMIE RWWSB 5 RWWSRE 5 BLBSET PGWRT PGERS SELFPRGEN 284 0x36 0x56 Reserved 0x35 0x55 MCUCR BODS BODSE PUD IVSEL IVCE 44 62 86 0x34 0x54 MCUSR WDRF BORF EXTRF PORF 54 0x33 0x53 SMCR SM2 SM1 SM0 SE 40 0...

Page 11: ...OUT instructions For the Extended I O space from 0x60 0xFF in SRAM only the ST STS STD and LD LDS LDD instructions can be used 5 Only valid for ATmega88PA 0x1D 0x3D EIMSK INT1 INT0 66 0x1C 0x3C EIFR INTF1 INTF0 66 0x1B 0x3B PCIFR PCIF2 PCIF1 PCIF0 0x1A 0x3A Reserved 0x19 0x39 Reserved 0x18 0x38 Reserved 0x17 0x37 TIFR2 OCF2B OCF2A TOV2 157 0x16 0x36 TIFR1 ICF1 OCF1B OCF1A TOV1 134 0x15 0x35 TIFR0 ...

Page 12: ...direct Jump to Z PC Z None 2 JMP 1 k Direct Jump PC k None 3 RCALL k Relative Subroutine Call PC PC k 1 None 3 ICALL Indirect Call to Z PC Z None 3 CALL 1 k Direct Subroutine Call PC k None 4 RET Subroutine Return PC STACK None 4 RETI Interrupt Return PC STACK I 4 CPSE Rd Rr Compare Skip if Equal if Rd Rr PC PC 2 or 3 None 1 2 3 CP Rd Rr Compare Rd Rr Z N V C H 1 CPC Rd Rr Compare with Carry Rd Rr...

Page 13: ...Between Registers Rd Rr None 1 MOVW Rd Rr Copy Register Word Rd 1 Rd Rr 1 Rr None 1 LDI Rd K Load Immediate Rd K None 1 LD Rd X Load Indirect Rd X None 2 LD Rd X Load Indirect and Post Inc Rd X X X 1 None 2 LD Rd X Load Indirect and Pre Dec X X 1 Rd X None 2 LD Rd Y Load Indirect Rd Y None 2 LD Rd Y Load Indirect and Post Inc Rd Y Y Y 1 None 2 LD Rd Y Load Indirect and Pre Dec Y Y 1 Rd Y None 2 LD...

Page 14: ... Rd STACK None 2 MCU CONTROL INSTRUCTIONS NOP No Operation None 1 SLEEP Sleep see specific descr for Sleep function None 1 WDR Watchdog Reset see specific descr for WDR timer None 1 BREAK Break For On chip Debug Only None N A Mnemonics Operands Description Operation Flags Clocks ...

Page 15: ... fully Green 3 See Speed Grades on page 306 4 NiPdAu Lead Finish Speed MHz Power Supply Ordering Code 2 Package 1 Operational Range 20 3 1 8 5 5 ATmega48PA AU ATmega48PA MMH 4 ATmega48PA MU ATmega48PA PU 32A 28M1 32M1 A 28P3 Industrial 40 C to 85 C Package Type 32A 32 lead Thin 1 0 mm Plastic Quad Flat Package TQFP 28M1 28 pad 4 x 4 x 1 0 body Lead Pitch 0 45 mm Quad Flat No Lead Micro Lead Frame ...

Page 16: ... 3 See Speed Grades on page 306 4 NiPdAu Lead Finish Speed MHz Power Supply Ordering Code 2 Package 1 Operational Range 20 3 1 8 5 5 ATmega88PA AU ATmega88PA MMH 4 ATmega88PA MU ATmega88PA PU 32A 28M1 32M1 A 28P3 Industrial 40 C to 85 C Package Type 32A 32 lead Thin 1 0 mm Plastic Quad Flat Package TQFP 28M1 28 pad 4 x 4 x 1 0 body Lead Pitch 0 45 mm Quad Flat No Lead Micro Lead Frame Package QFN ...

Page 17: ...3 See Speed Grades on page 312 4 NiPdAu Lead Finish Speed MHz 3 Power Supply Ordering Code 2 Package 1 Operational Range 20 1 8 5 5 ATmega168PA AU ATmega168PA MMH 4 ATmega168PA MU ATmega168PA PU 32A 28M1 32M1 A 28P3 Industrial 40 C to 85 C Package Type 32A 32 lead Thin 1 0 mm Plastic Quad Flat Package TQFP 28M1 28 pad 4 x 4 x 1 0 body Lead Pitch 0 45 mm Quad Flat No Lead Micro Lead Frame Package Q...

Page 18: ... of Hazardous Substances RoHS directive Also Halide free and fully Green 3 See Figure 28 1 on page 316 Speed MHz Power Supply Ordering Code 2 Package 1 Operational Range 20 3 1 8 5 5 ATmega328P AU ATmega328P MU ATmega328P PU 32A 32M1 A 28P3 Industrial 40 C to 85 C Package Type 32A 32 lead Thin 1 0 mm Plastic Quad Flat Package TQFP 28P3 28 lead 0 300 Wide Plastic Dual Inline Package PDIP 32M1 A 32 ...

Page 19: ...E B Notes 1 This package conforms to JEDEC reference MS 026 Variation ABA 2 Dimensions D1 and E1 do not include mold protrusion Allowable protrusion is 0 25 mm per side Dimensions D1 and E1 are maximum plastic body size dimensions including mold mismatch 3 Lead coplanarity is 0 10 mm maximum A 1 20 A1 0 05 0 15 A2 0 95 1 00 1 05 D 8 75 9 00 9 25 D1 6 90 7 00 7 10 Note 2 E 8 75 9 00 9 25 E1 6 90 7 ...

Page 20: ...Very Thin Quad Flat No Lead Package VQFN 10 24 08 SIDE VIEW Pin 1 ID BOTTOM VIEW TOP VIEW Note The terminal 1 ID is a Laser marked Feature D E e K A1 C A D2 E2 y L 1 2 3 b 1 2 3 0 45 COMMON DIMENSIONS Unit of Measure mm SYMBOL MIN NOM MAX NOTE A 0 80 0 90 1 00 A1 0 00 0 02 0 05 b 0 17 0 22 0 27 C 0 20 REF D 3 95 4 00 4 05 D2 2 35 2 40 2 45 E 3 95 4 00 4 05 E2 2 35 2 40 2 45 e 0 45 L 0 35 0 40 0 45...

Page 21: ...SIONS Unit of Measure mm SYMBOL MIN NOM MAX NOTE D1 D E1 E e b A3 A2 A1 A D2 E2 0 08 C L 1 2 3 P P 0 1 2 3 A 0 80 0 90 1 00 A1 0 02 0 05 A2 0 65 1 00 A3 0 20 REF b 0 18 0 23 0 30 D D1 D2 2 95 3 10 3 25 4 90 5 00 5 10 4 70 4 75 4 80 4 70 4 75 4 80 4 90 5 00 5 10 E E1 E2 2 95 3 10 3 25 e 0 50 BSC L 0 30 0 40 0 50 P 0 60 12o Note JEDEC Standard MO 220 Fig 2 Anvil Singulation VHHD 2 TOP VIEW SIDE VIEW...

Page 22: ... B REF E B1 C L SEATING PLANE A 0º 15º D e eB B2 4 PLACES COMMON DIMENSIONS Unit of Measure mm SYMBOL MIN NOM MAX NOTE A 4 5724 A1 0 508 D 34 544 34 798 Note 1 E 7 620 8 255 E1 7 112 7 493 Note 1 B 0 381 0 533 B1 1 143 1 397 B2 0 762 1 143 L 3 175 3 429 C 0 203 0 356 eB 10 160 e 2 540 TYP Note 1 Dimensions D and E1 do not include mold Flash or Protrusion Mold Flash or Protrusion shall not exceed 0...

Page 23: ...168PA device 9 3 1 Rev E No known errata 9 4 Errata ATmega328P The revision letter in this section refers to the revision of the ATmega328P device 9 4 1 Rev D No known errata 9 4 2 Rev C Not sampled 9 4 3 Rev B Unstable 32 kHz Oscillator 1 Unstable 32 kHz Oscillator The 32 kHz oscillator does not work as system clock The 32 kHz oscillator used as asynchronous timer is inaccurate Problem Fix Workar...

Page 24: ...e 57 7 Updated External Interrupts on page 70 8 Updated Boot Loader Support Read While Write Self Programming ATmega88PA ATmega168PA and ATmega328P on page 277 9 Inserted ATmega168PA DC Characteristics on page 315 10 Inserted ATmega328P DC Characteristics on page 316 11 Inserted ATmega168PA Typical Characteristics on page 375 12 Inserted ATmega328P Typical Characteristics on page 399 13 Inserted O...

Page 25: ...7 by removing the footnote from Vcc User calibration 12 Updated Table 28 7 on page 323 by removing Max value 2 5 LSB from Absolute accuracy VREF 4V VCC 4V ADC clock 200 kHz 13 Inserted Ordering Information for ATmega48PA on page 430 1 Initial revision Based on the ATmega48P 88P 168P 328P datasheet 8025F AVR 08 08 2 Changes done compared to ATmega48P 88P 168P 328P datasheet 8025F AVR 08 08 Updated ...

Page 26: ...ED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTY OF MERCHANTABILITY FITNESS FOR A PARTICULAR PURPOSE OR NON INFRINGEMENT IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT INDIRECT CONSEQUENTIAL PUNITIVE SPECIAL OR INCIDEN TAL DAMAGES INCLUDING WITHOUT LIMITATION DAMAGES FOR LOSS OF PROFITS BUSINESS INTERRUPTION OR LOSS OF INFORMATION ARISING OUT OF...

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