Atmel AVR ATmega1284P Specification Sheet Download | Manualshive

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8152GS–AVR–11/09

ATmega164PA/324PA/644PA/1284P

10. Errata

10.1

ATmega164PA Rev. E

No known Errata.

10.2

ATmega324PA Rev. F

No known Errata.

10.3

ATmega644PA Rev. F

No known Errata.

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Summary of Contents for AVR ATmega1284P

Page 1: ...with Separate Prescalers and Compare Modes One 16 bit Timer Counter with Separate Prescaler Compare Mode and Capture Mode Real Time Counter with Separate Oscillator Six PWM Channels 8 channel 10 bit ADC Differential mode with selectable gain at 1x 10x or 200x Byte oriented Two wire Serial Interface Two Programmable Serial USART Master Slave SPI Serial Interface Programmable Watchdog Timer with Sep...

Page 2: ...T3 PA4 ADC4 PCINT4 PA5 ADC5 PCINT5 PA6 ADC6 PCINT6 PA7 ADC7 PCINT7 AREF GND AVCC PC7 TOSC2 PCINT23 PC6 TOSC1 PCINT22 PC5 TDI PCINT21 PC4 TDO PCINT20 PC3 TMS PCINT19 PC2 TCK PCINT18 PC1 SDA PCINT17 PC0 SCL PCINT16 PD7 OC2A PCINT31 PDIP PA4 ADC4 PCINT4 PA5 ADC5 PCINT5 PA6 ADC6 PCINT6 PA7 ADC7 PCINT7 AREF GND AVCC PC7 TOSC2 PCINT23 PC6 TOSC1 PCINT22 PC5 TDI PCINT21 PC4 TDO PCINT20 PCINT13 MOSI PB5 PC...

Page 3: ...13 GND B18 GND A4 XTAL2 A10 GND A16 AREF A22 PB0 B4 XTAL1 B9 PC0 B14 PA7 B19 PB1 A5 PD0 A11 PC1 A17 PA6 A23 PB2 B5 PD1 B10 PC2 B15 PA5 B20 PB3 A6 PD2 A12 PC3 A18 PA4 A24 PB4 Top view Bottom view A1 B1 A2 B2 A3 B3 A4 B4 A5 B5 A6 A18 B15 A17 B14 A16 B13 A15 B12 A14 B11 A13 A12 B10 A11 B9 A10 B8 A9 B7 A8 B6 A7 A24 B20 A23 B19 A22 B18 A21 B17 A20 B16 A19 A18 B15 A17 B14 A16 B13 A15 B12 A14 B11 A13 A1 ...

Page 4: ... 1 2 BGA Pinout 1 2 3 4 5 6 7 A GND PB4 PB2 GND VCC PA2 GND B PB6 PB5 PB3 PB0 PA0 PA3 PA5 C VCC RESET PB7 PB1 PA1 PA6 AREF D GND XTAL2 PD0 GND PA4 PA7 GND E XTAL1 PD1 PD5 PD7 PC5 PC7 AVCC F PD2 PD3 PD6 PC0 PC2 PC4 PC6 G GND PD4 VCC GND PC1 PC3 GND A B C D E F G 1 2 3 4 5 6 7 A B C D E F G 7 6 5 4 3 2 1 Top view Bottom view ...

Page 5: ...l purpose working registers All the 32 registers are directly connected to the Arithmetic Logic Unit ALU allowing two independent registers to be accessed in one single instruction executed in one clock cycle The resulting architecture is more code efficient while achieving throughputs up to ten times faster than con ventional CISC microcontrollers CPU GND VCC RESET Power Supervision POR BOD RESET...

Page 6: ...r is running while the rest of the device is sleeping This allows very fast start up combined with low power consump tion In Extended Standby mode both the main Oscillator and the Asynchronous Timer continue to run The device is manufactured using Atmel s high density nonvolatile memory technology The On chip ISP Flash allows the program memory to be reprogrammed in system through an SPI serial in...

Page 7: ...hen a reset condition becomes active even if the clock is not running Port B also serves the functions of various special features of the ATmega164PA 324PA 644PA 1284P as listed on page 83 2 3 5 Port C PC7 PC0 Port C is an 8 bit bi directional I O port with internal pull up resistors selected for each bit The Port C output buffers have symmetrical drive characteristics with both high sink and sour...

Page 8: ...teed to generate a reset 2 3 8 XTAL1 Input to the inverting Oscillator amplifier and input to the internal clock operating circuit 2 3 9 XTAL2 Output from the inverting Oscillator amplifier 2 3 10 AVCC AVCC is the supply voltage pin for Port A and the Analog to digital Converter It should be exter nally connected to VCC even if the ADC is not used If the ADC is used it should be connected to VCC t...

Page 9: ... and interrupt handling in C is compiler dependent Please confirm with the C compiler documen tation for more details The code examples assume that the part specific header file is included before compilation For I O registers located in extended I O map IN OUT SBIS SBIC CBI and SBI instruc tions must be replaced with instructions that allow access to extended I O Typically LDS and STS combined wi...

Page 10: ...xDB Reserved 0xDA Reserved 0xD9 Reserved 0xD8 Reserved 0xD7 Reserved 0xD6 Reserved 0xD5 Reserved 0xD4 Reserved 0xD3 Reserved 0xD2 Reserved 0xD1 Reserved 0xD0 Reserved 0xCF Reserved 0xCE UDR1 USART1 I O Data Register 190 0xCD UBRR1H USART1 Baud Rate Register High Byte 194 207 0xCC UBRR1L USART1 Baud Rate Register Low Byte 194 207 0xCB Reserved 0xCA UCSR1C UMSEL11 UMSEL10 UDORD1 UCPHA1 UCPOL1 192 20...

Page 11: ...d 0xA6 Reserved 0xA5 Reserved 0xA4 Reserved 0xA3 Reserved 0xA2 Reserved 0xA1 Reserved 0xA0 Reserved 0x9F Reserved 0x9E Reserved 0x9D Reserved 0x9C Reserved 0x9B Reserved 0x9A Reserved 0x99 Reserved 0x98 Reserved 0x97 Reserved 0x96 Reserved 0x95 Reserved 0x94 Reserved 0x93 Reserved 0x92 Reserved 0x91 Reserved 0x90 Reserved 0x8F Reserved 0x8E Reserved 0x8D Reserved 0x8C Reserved 0x8B OCR1BH Timer Co...

Page 12: ...E 0x5E SPH SP15 SP14 SP13 SP12 SP11 SP10 SP9 SP8 12 0x3D 0x5D SPL SP7 SP6 SP5 SP4 SP3 SP2 SP1 SP0 12 0x3C 0x5C Reserved 0x3B 0x5B Reserved 0x3A 0x5A Reserved 0x39 0x59 Reserved 0x38 0x58 Reserved 0x37 0x57 SPMCSR SPMIE RWWSB SIGRD RWWSRE BLBSET PGWRT PGERS SPMEN 290 0x36 0x56 Reserved 0x35 0x55 MCUCR JTD BODS BODSE PUD IVSEL IVCE 92 276 0x34 0x54 MCUSR JTRF WDRF BORF EXTRF PORF 59 276 0x33 0x53 SM...

Page 13: ...ST STS STD and LD LDS LDD instructions can be used 0x1C 0x3C EIFR INTF2 INTF1 INTF0 69 0x1B 0x3B PCIFR PCIF3 PCIF2 PCIF1 PCIF0 70 0x1A 0x3A Reserved 0x19 0x39 Reserved 0x18 0x38 Reserved 0x17 0x37 TIFR2 OCF2B OCF2A TOV2 160 0x16 0x36 TIFR1 ICF1 OCF1B OCF1A TOV1 139 0x15 0x35 TIFR0 OCF0B OCF0A TOV0 110 0x14 0x34 Reserved 0x13 0x33 Reserved 0x12 0x32 Reserved 0x11 0x31 Reserved 0x10 0x30 Reserved 0x...

Page 14: ...k Relative Jump PC PC k 1 None 2 IJMP Indirect Jump to Z PC Z None 2 JMP k Direct Jump PC k None 3 RCALL k Relative Subroutine Call PC PC k 1 None 4 ICALL Indirect Call to Z PC Z None 4 CALL k Direct Subroutine Call PC k None 5 RET Subroutine Return PC STACK None 5 RETI Interrupt Return PC STACK I 5 CPSE Rd Rr Compare Skip if Equal if Rd Rr PC PC 2 or 3 None 1 2 3 CP Rd Rr Compare Rd Rr Z N V C H ...

Page 15: ...ag in SREG H 0 H 1 DATA TRANSFER INSTRUCTIONS MOV Rd Rr Move Between Registers Rd Rr None 1 MOVW Rd Rr Copy Register Word Rd 1 Rd Rr 1 Rr None 1 LDI Rd K Load Immediate Rd K None 1 LD Rd X Load Indirect Rd X None 2 LD Rd X Load Indirect and Post Inc Rd X X X 1 None 2 LD Rd X Load Indirect and Pre Dec X X 1 Rd X None 2 LD Rd Y Load Indirect Rd Y None 2 LD Rd Y Load Indirect and Post Inc Rd Y Y Y 1 ...

Page 16: ...d Pop Register from Stack Rd STACK None 2 MCU CONTROL INSTRUCTIONS NOP No Operation None 1 SLEEP Sleep see specific descr for Sleep function None 1 WDR Watchdog Reset see specific descr for WDR timer None 1 BREAK Break For On chip Debug Only None N A Mnemonics Operands Description Operation Flags Clocks ...

Page 17: ...peed MHz 3 Power Supply Ordering Code 2 Package 1 Operational Range 20 1 8 5 5V ATmega164PA AU ATmega164PA PU ATmega164PA MU ATmega164PA MCH 4 ATmega164PA CU 44A 40P6 44M1 44MC 49C2 Industrial 40o C to 85o C Package Type 44A 44 lead Thin 1 0 mm Plastic Gull Wing Quad Flat Package TQFP 40P6 40 pin 0 600 Wide Plastic Dual Inline Package PDIP 44M1 44 pad 7 x 7 x 1 0 mm body lead pitch 0 50 mm Thermal...

Page 18: ...ower Supply Ordering Code 2 Package 1 Operational Range 20 1 8 5 5V ATmega324PA AU ATmega324PA PU ATmega324PA MU ATmega324PA MCH 4 ATmega324PA CU 44A 40P6 44M1 44MC 49C2 Industrial 40o C to 85o C Package Type 44A 44 lead Thin 1 0 mm Plastic Gull Wing Quad Flat Package TQFP 40P6 40 pin 0 600 Wide Plastic Dual Inline Package PDIP 44M1 44 pad 7 x 7 x 1 0 mm body lead pitch 0 50 mm Thermally Enhanced ...

Page 19: ...tances RoHS directive Also Halide free and fully Green 3 For Speed vs VCC see Speed Grades on page 328 Speed MHz 3 Power Supply Ordering Code 2 Package 1 Operational Range 20 1 8 5 5V ATmega644PA AU ATmega644PA PU ATmega644PA MU 44A 40P6 44M1 Industrial 40o C to 85o C Package Type 44A 44 lead Thin 1 0 mm Plastic Gull Wing Quad Flat Package TQFP 40P6 40 pin 0 600 Wide Plastic Dual Inline Package PD...

Page 20: ...bstances RoHS directive Also Halide free and fully Green 3 For Speed vs VCC see Speed Grades on page 332 Speed MHz 3 Power Supply Ordering Code Package 1 Operational Range 20 1 8 5 5V ATmega1284P AU 2 ATmega1284P PU 2 ATmega1284P MU 2 44A 40P6 44M1 Industrial 40o C to 85o C Package Type 44A 44 lead Thin 1 0 mm Plastic Gull Wing Quad Flat Package TQFP 40P6 40 pin 0 600 Wide Plastic Dual Inline Pack...

Page 21: ...B COMMON DIMENSIONS Unit of Measure mm SYMBOL MIN NOM MAX NOTE Notes 1 This package conforms to JEDEC reference MS 026 Variation ACB 2 Dimensions D1 and E1 do not include mold protrusion Allowable protrusion is 0 25 mm per side Dimensions D1 and E1 are maximum plastic body size dimensions including mold mismatch 3 Lead coplanarity is 0 10 mm maximum A 1 20 A1 0 05 0 15 A2 0 95 1 00 1 05 D 11 75 12...

Page 22: ...G PLANE A 0º 15º D e eB COMMON DIMENSIONS Unit of Measure mm SYMBOL MIN NOM MAX NOTE A 4 826 A1 0 381 D 52 070 52 578 Note 2 E 15 240 15 875 E1 13 462 13 970 Note 2 B 0 356 0 559 B1 1 041 1 651 L 3 048 3 556 C 0 203 0 381 eB 15 494 17 526 e 2 540 TYP Notes 1 This package conforms to JEDEC reference MS 011 Variation AC 2 Dimensions D and E1 do not include mold Flash or Protrusion Mold Flash or Prot...

Page 23: ... 26 08 COMMON DIMENSIONS Unit of Measure mm SYMBOL MIN NOM MAX NOTE A 0 80 0 90 1 00 A1 0 02 0 05 A3 0 20 REF b 0 18 0 23 0 30 D D2 5 00 5 20 5 40 6 90 7 00 7 10 6 90 7 00 7 10 E E2 5 00 5 20 5 40 e 0 50 BSC L 0 59 0 64 0 69 K 0 20 0 26 0 41 Note JEDEC Standard MO 220 Fig 1 SAW Singulation VKKD 3 TOP VIEW SIDE VIEW BOTTOM VIEW D E Marked Pin 1 ID E2 D2 b e Pin 1 Corner L A1 A3 A SEATING PLANE Pin ...

Page 24: ...VIEW A1 A y C D E Pin 1 ID TOP VIEW BOTTOM VIEW Note 1 The terminal 1 ID is a Laser marked Feature COMMON DIMENSIONS Unit of Measure mm SYMBOL MIN NOM MAX NOTE A 0 80 0 90 1 00 A1 0 00 0 02 0 05 b 0 18 0 23 0 30 C 0 20 REF D 4 90 5 00 5 10 D2 2 55 2 60 2 65 E 4 90 5 00 5 10 E2 2 55 2 60 2 65 eT 0 70 eR 0 40 K 0 45 L 0 30 0 35 0 40 y 0 00 0 075 44MC 44QFN 2 Row Staggered 5 x 5 x 1 00 mm Body 2 60 x...

Page 25: ...itch 5 0 x 5 0 x 1 0 mm Very Thin Fine Pitch Ball Grid Array Package VFBGA 3 14 08 COMMON DIMENSIONS Unit of Measure mm SYMBOL MIN NOM MAX NOTE A 1 00 A1 0 20 A2 0 65 D 4 90 5 00 5 10 D1 3 90 BSC E 4 90 5 00 5 10 E1 3 90 BSC b 0 30 0 35 0 40 e 0 65 BSC TOP VIEW SIDE VIEW A1 BALL ID G F E D C B A 1 2 3 4 5 6 7 A A1 A2 D E 0 10 E1 D1 49 Ø0 35 0 05 e A1 BALL CORNER BOTTOM VIEW b e ...

Page 26: ...26 8152GS AVR 11 09 ATmega164PA 324PA 644PA 1284P 10 Errata 10 1 ATmega164PA Rev E No known Errata 10 2 ATmega324PA Rev F No known Errata 10 3 ATmega644PA Rev F No known Errata ...

Page 27: ...for Low frequency Oscillator 2 Updated ordering information for 324PA 1 Removed RAMPZ Extended Z pointer Register for ELPM SPM on page 15 2 Updated EEARH and EEARL The EEPROM Address Register on page 24 3 Updated Addressing the Flash During Self Programming on page 282 by removing RAMPZ 4 Updated Serial Programming Pin Mapping on page 309 5 Updated Register Summary on page 415 by removing RAMPZ re...

Page 28: ...Tmega644PA Typical Characteristics on page 390 11 Inserted ATmega644PA Ordering Information 12 Updated Errata on page 430 1 Updated Features on page 1 by inserting ATmega324PA device and updated the whole datasheet accordingly 2 Updated Overview on page 5 3 Inserted Comparison Between ATmega164PA and ATmega324PA on page 6 4 Updated all resgister description in AVR CPU Core on page 10 5 Updated AVR...

Page 29: ... revision Based on the ATmega164P 324P 644P datasheet 8011K AVR 09 08 2 Changes done compared to ATmega164P 324P 644P datasheet 8011K AVR 09 08 New graphics in Typical Characteristics on page 337 New Ordering Information on page 395 ...

Page 30: ... STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTY OF MERCHANTABILITY FITNESS FOR A PARTICULAR PURPOSE OR NON INFRINGEMENT IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT INDIRECT CONSEQUENTIAL PUNITIVE SPECIAL OR INCIDEN TAL DAMAGES INCLUDING WITHOUT LIMITATION DAMAGES FOR LOSS OF PROFITS BUSINESS INTERRUPTION OR LOSS OF INFORMATION ARISING OUT OF THE ...

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