Atmel ATSAML22G16A-AUT, Manual

Page: 475 / 1231

26.8.14. Active Channel and Levels
Name: ACTIVE
Offset: 0x30
Reset: 0x00000000
Property:
-
Bit 31 30 29 28 27 26 25 24
BTCNT[15:8]
Access R R R R R R R R
Reset 0 0 0 0 0 0 0 0
Bit 23 22 21 20 19 18 17 16
BTCNT[7:0]
Access R R R R R R R R
Reset 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8
ABUSY ID[4:0]
Access R R R R R R
Reset 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
LVLEX3 LVLEX2 LVLEX1 LVLEX0
Access R R R R
Reset 0 0 0 0
Bits 31:16 – BTCNT[15:0]: Active Channel Block Transfer Count
These bits hold the 16-bit block transfer count of the ongoing transfer. This value is stored in the active
channel and written back in the corresponding Write-Back channel memory location when the arbiter
grants a new channel access. The value is valid only when the active channel active busy flag (ABUSY)
is set.
Bit 15 – ABUSY: Active Channel Busy
This bit is cleared when the active transfer count is written back in the write-back memory section.
This bit is set when the next descriptor transfer count is read from the write-back memory section.
Bits 12:8 – ID[4:0]: Active Channel ID
These bits hold the channel index currently stored in the active channel registers. The value is updated
each time the arbiter grants a new channel transfer access request.
Bits 3,2,1,0 – LVLEXx: Level x Channel Trigger Request Executing [x=3..0]
This bit is set when a level-x channel trigger request is executing or pending.
This bit is cleared when no request is pending or being executed.
Atmel SAM L22G / L22J / L22N [DATASHEET]
Atmel-42402E-SAM L22G / L22J / L22N_Datasheet_Complete-07/2016
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