26.8.9. Priority Control 0
Name:
PRICTRL0
Offset:
0x14
Reset:
0x00000000
Property:
PAC Write-Protection
Bit
31
30
29
28
27
26
25
24
RRLVLEN3
LVLPRI3[3:0]
Access
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
Bit
23
22
21
20
19
18
17
16
RRLVLEN2
LVLPRI2[3:0]
Access
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
RRLVLEN1
LVLPRI1[3:0]
Access
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
RRLVLEN0
LVLPRI0[3:0]
Access
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
Bit 31 – RRLVLEN3: Level 3 Round-Robin Arbitration Enable
This bit controls which arbitration scheme is selected for DMA channels with priority level 3. For details on
arbitration schemes, refer to
Value
Description
0
Static arbitration scheme for channels with level 3 priority.
1
Round-robin arbitration scheme for channels with level 3 priority.
Bits 27:24 – LVLPRI3[3:0]: Level 3 Channel Priority Number
When round-robin arbitration is enabled (PRICTRL0.RRLVLEN3=1) for priority level 3, this register holds
the channel number of the last DMA channel being granted access as the active channel with priority
level 3.
When static arbitration is enabled (PRICTRL0.RRLVLEN3=0) for priority level 3, and the value of this bit
group is non-zero, it will not affect the static priority scheme.
This bit group is not reset when round-robin arbitration gets disabled (PRICTRL0.RRLVLEN3 written to
'0').
Bit 23 – RRLVLEN2: Level 2 Round-Robin Arbitration Enable
This bit controls which arbitration scheme is selected for DMA channels with priority level 2. For details on
arbitration schemes, refer to
Atmel SAM L22G / L22J / L22N [DATASHEET]
Atmel-42402E-SAM L22G / L22J / L22N_Datasheet_Complete-07/2016
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