Atmel AT91SAM9M10-G45-EK User Manual Download Page 59

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

D

D

C

C

B

B

A

A

(SDA10)

(SDA10)

(NCS3)

(RDY/BSY)

(NANDALE)

(NANDCLE)

(NCS1)

IMPORTANT note about system booting:                                   
The bootROM allows booting from the block 0 of a NandFlash connected
on CS3. However, the bootROM does not feature ECC (Error Checking and  
Correction) on NandFlash.                                              
Most of the NandFlash vendors do not guarantee anymore that block 0    
is error free. Therefore we advise the bootstrap program to be located 
into another device supported by the bootrom (DataFlash, Serial Flash, 
SDCARD or EEPROM) and implement NandFlash access with ECC.

WP

RE

WE

CE

RB

EBI1_NAND_FSH_D6

EBI1_NAND_FSH_D0

EBI1_NAND_FSH_D3

EBI1_NAND_FSH_D4

EBI1_NAND_FSH_D2

EBI1_NAND_FSH_D1

EBI1_NAND_FSH_D5

EBI1_NAND_FSH_D7

EBI1_NAND_FSH_D14

EBI1_NAND_FSH_D8

EBI1_NAND_FSH_D11

EBI1_NAND_FSH_D12

EBI1_NAND_FSH_D10

EBI1_NAND_FSH_D9

EBI1_NAND_FSH_D13

EBI1_NAND_FSH_D15

EBI1_DDR_D15

EBI1_DDR_D11

EBI1_DDR_D10

EBI1_DDR_D12

EBI1_DDR_D8

EBI1_DDR_D9

EBI1_DDR_D13

EBI1_DDR_D14

EBI1_DDR_D7

EBI1_DDR_D3

EBI1_DDR_D2

EBI1_DDR_D4

EBI1_DDR_D0

EBI1_DDR_D1

EBI1_DDR_D5

EBI1_DDR_D6

EBI1_FLASH_D4

EBI1_FLASH_D2

EBI1_FLASH_D10

EBI1_FLASH_D5

EBI1_FLASH_D12

EBI1_FLASH_D9

EBI1_FLASH_D14

EBI1_FLASH_D15

EBI1_FLASH_D3

EBI1_FLASH_D0

EBI1_FLASH_D6

EBI1_FLASH_D7

EBI1_FLASH_D8

EBI1_FLASH_D1

EBI1_FLASH_D13

EBI1_FLASH_D11

EBI1_DDR_A2

EBI1_DDR_A3

EBI1_DDR_A4

EBI1_DDR_A5

EBI1_DDR_A6

EBI1_DDR_A7

EBI1_DDR_A8

EBI1_DDR_A9

EBI1_DDR_A10

EBI1_DDR_A11

EBI1_DDR_A12

EBI1_DDR_A13

EBI1_DDR_A15

EBI1_DDR_A14

EBI1_DDR_A2

EBI1_DDR_A3

EBI1_DDR_A4

EBI1_DDR_A5

EBI1_DDR_A6

EBI1_DDR_A7

EBI1_DDR_A8

EBI1_DDR_A9

EBI1_DDR_A10

EBI1_DDR_A11

EBI1_DDR_A12

EBI1_DDR_A13

EBI1_DDR_A15

EBI1_DDR_A14

NCLK_EBI1

CS_EBI1

BA0_EBI1

BA1_EBI1

RAS_EBI1

CAS_EBI1

WE_EBI1

CKE_EBI1

CLK_EBI1

NCLK_EBI1

CS_EBI1

BA0_EBI1

BA1_EBI1

RAS_EBI1

CAS_EBI1

WE_EBI1

CKE_EBI1

VREF1

EBI1_FLASH_A1

EBI1_FLASH_A2

EBI1_FLASH_A3

EBI1_FLASH_A4

EBI1_FLASH_A5

EBI1_FLASH_A6

EBI1_FLASH_A7

EBI1_FLASH_A8

EBI1_FLASH_A9

EBI1_FLASH_A10

EBI1_FLASH_A11

EBI1_FLASH_A12

EBI1_FLASH_A15

EBI1_FLASH_A14

EBI1_FLASH_A13

EBI1_FLASH_A16

EBI1_FLASH_A18

EBI1_FLASH_A17

VREF1

VREF1

EBI1_FLASH_A19

EBI1_FLASH_A20

EBI1_FLASH_A21

CLK_EBI1

1V8

1V8

1V8

1V8

1V8

1V8

1V8

1V8

EBI1_FLASH_D[0..15]

{4}

BA0_EBI1

{4}

PC8

{3}

EBI1_DDR_D[0..15]

{4}

EBI1_FLASH_A[1..21]

{4}

EBI1_DDR_A[2..15]

{4}

BA1_EBI1

{4}

CKE_EBI1

{4}

CLK_EBI1

{4}

NCLK_EBI1

{4}

CS_EBI1

{4}

CAS_EBI1

{4}

RAS_EBI1

{4}

WE_EBI1

{4}

DQS0_EBI1 {4}

DQM0_EBI1 {4}

DQS1_EBI1 {4}

DQM1_EBI1 {4}

DDR_VREF

{3,5}

PC5

{3}

PC4

{3,4}

EBI1_NANDOE

{3}

EBI1_NANDWE

{3}

PC14

{3}

EBI1_NAND_FSH_D[0..15]

{4}

EBI1_NRD/CFOE

{3}

EBI1_NWE/NWR0/CFWE

{3}

EBI1_NCS0

{3}

REV

DATE

MODIF.

DES.

DATE

VER.

SCALE

1/1

REV.

SHEET

This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.

A

AT91SAM9M10-G45-EK

6

12

A2

11-FEB-10

Derek

PP

EBI1_MEMORY

05-Feb-10

08-apr-10

PP

A2

REV

DATE

MODIF.

DES.

DATE

VER.

SCALE

1/1

REV.

SHEET

This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.

A

AT91SAM9M10-G45-EK

6

12

A2

11-FEB-10

Derek

PP

EBI1_MEMORY

05-Feb-10

08-apr-10

PP

A2

REV

DATE

MODIF.

DES.

DATE

VER.

SCALE

1/1

REV.

SHEET

This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.

A

AT91SAM9M10-G45-EK

6

12

A2

11-FEB-10

Derek

PP

EBI1_MEMORY

05-Feb-10

08-apr-10

PP

A2

DDR2 SDRAM

MN8

MT47H64M8CF-3 -F

DDR2 SDRAM

MN8

MT47H64M8CF-3 -F

A0

H8

A1

H3

A2

H7

A3

J2

A4

J8

A5

J3

A6

J7

A7

K2

A8

K8

A9

K3

A10

H2

BA0

G2

ODT

F9

DQ0

C8

DQ1

C2

DQ2

D7

DQ3

D3

DQ4

D1

DQ5

D9

DQ6

B1

DQ7

B9

DQS

B7

DQS

A8

RDQS/DM

B3

RDQS/NU

A2

VDD

H9

VDD

L1

VDDL

E1

VREF

E2

VDDQ

C9

VSS

A3

VSS

E3

VDDQ

A9

VDD

E9

RFU1

G1

RFU2

L3

CKE

F2

CK

E8

CK

F8

CAS

G7

RAS

F7

WE

F3

CS

G8

VDDQ

C1

VDDQ

C3

VDDQ

C7

VSSQ

B2

VSSQ

B8

VSSQ

D2

VSSQ

D8

VDD

A1

VSS

J1

A11

K7

BA1

G3

A12

L2

A13

L8

VSS

K9

VSSDL

E7

VSSQ

A7

RFU3

L7

R58

0R

R58

0R

R55

100k

R55

100k

C92

100n

C92

100n

C93 100n

C93 100n

C94

100n

C94

100n

C119 100n

C119 100n

JP9

JP9

1

2

C116

100n

C116

100n

C114

100n

C114

100n

R57

0R

R57

0R

C99 100n

C99 100n

NAND FLASH

MN11

MT29F2G08ABDHC:D

NAND FLASH

MN11

MT29F2G08ABDHC:D

WE

C7

N.C6

B9

VCC

H8

CE

C6

RE

D4

N.C11

E3

WP

C3

N.C5

B1

N.C1

A1

N.C2

A2

N.C3

A9

N.C4

A10

N.C12

E4

N.C13

E5

N.C14

E6

N.C15

E7

R/B

C8

N.C17

F3

N.C36

M1

I/O0

H4

N.C34

L9

N.C25

L2

VSS

F7

N.C29

J5

VCC

J6

VSS

K3

ALE

C4

N.C8

D6

N.C7

B10

N.C9

D7

N.C10

D8

CLE

D5

N.C16

E8

N.C35

L10

I/O1

J4

I/O3

K5

I/O2

K4

N.C28

H5

N.C30

H6

N.C32

H7

I/O7

J8

I/O6

K7

I/O5

J7

I/O4

K6

N.C27

J3

N.C26

H3

VSS

C5

N.C24

L1

VSS

K8

LOCK

G5

VCC

D3

VCC

G4

N.C31

G6

N.C18

F4

N.C19

F5

N.C20

F6

N.C22

G3

N.C21

F8

N.C33

G7

N.C23

G8

N.C37

M2

N.C38

M9

N.C39

M10

MN10

M58WR032KT_VFBGA56

DNP

MN10

M58WR032KT_VFBGA56

DNP

A1

D8

A2

C8

A3

B8

A4

A8

A5

B7

A6

A7

A7

C7

A8

A2

A9

B2

A10

C2

A11

A1

A12

B1

A13

C1

A14

D2

A15

D1

A16

D4

A17

B6

A18

A6

A19

C6

A20

B3

DQ0

F7

DQ1

E6

DQ2

E5

DQ3

G5

DQ4

E4

DQ5

G3

DQ6

E3

DQ7

G1

DQ8

G7

DQ9

F6

DQ10

F5

DQ11

F4

DQ12

D5

DQ13

F3

DQ14

F2

DQ15

E2

VDD

A4

VDD

G4

VDDQ

E1

VDDQ

G6

VPP

A5

VSS

A3

VSS

F1

VSSQ

G2

VSSQ

G8

NC/A21

C3

NC

D7

CE

E7

OE

F8

WE

C5

RESET

B5

WP

D6

CLK

B4

LATCH

C4

WAIT

D3

A0

E8

C106

100n

C106

100n

C113

100n

C113

100n

R56

470k

R56

470k

C105 100n

C105 100n

R61

1k

R61

1k

R53

100k

R53

100k

R54

0R

R54

0R

C95 100n

C95 100n

C104

100n

C104

100n

C107 100n

C107 100n

R200

0R

R200

0R

C100

100n

C100

100n

JP10

SIP2

JP10

SIP2

1

2

C118 100n

C118 100n

C102

100n

C102

100n

C121 100n

C121 100n

C101 100n

C101 100n

R63

0R

DNP

R63

0R

DNP

C117

100n

C117

100n

C108

100n

C108

100n

R60

0R

R60

0R

DDR2 SDRAM

MN9

MT47H64M8CF-3 -F

DDR2 SDRAM

MN9

MT47H64M8CF-3 -F

A0

H8

A1

H3

A2

H7

A3

J2

A4

J8

A5

J3

A6

J7

A7

K2

A8

K8

A9

K3

A10

H2

BA0

G2

ODT

F9

DQ0

C8

DQ1

C2

DQ2

D7

DQ3

D3

DQ4

D1

DQ5

D9

DQ6

B1

DQ7

B9

DQS

B7

DQS

A8

RDQS/DM

B3

RDQS/NU

A2

VDD

H9

VDD

L1

VDDL

E1

VREF

E2

VDDQ

C9

VSS

A3

VSS

E3

VDDQ

A9

VDD

E9

RFU1

G1

RFU2

L3

CKE

F2

CK

E8

CK

F8

CAS

G7

RAS

F7

WE

F3

CS

G8

VDDQ

C1

VDDQ

C3

VDDQ

C7

VSSQ

B2

VSSQ

B8

VSSQ

D2

VSSQ

D8

VDD

A1

VSS

J1

A11

K7

BA1

G3

A12

L2

A13

L8

VSS

K9

VSSDL

E7

VSSQ

A7

RFU3

L7

C109 100n

C109 100n

C112 100n

C112 100n

R59

470k

R59

470k

C111

100n

C111

100n

C120 100n

C120 100n

C103 100n

C103 100n

C98

100n

C98

100n

C110

100n

C110

100n

C96

100n

C96

100n

C115

100n

C115

100n

C97 100n

C97 100n

R62

470k

R62

470k

Summary of Contents for AT91SAM9M10-G45-EK

Page 1: ...6495B ATARM 21 Apr 10 AT91SAM9M10 G45 EK User Guide...

Page 2: ...ion 4 1 4 1 Equipment on the Board 4 1 4 1 1 Interfaces 4 1 4 1 2 Board Interface Connection 4 2 4 1 3 Push Button Switches 4 2 4 1 4 Display LCD and LEDs 4 3 4 2 Hardware Layout and Configuration 4 3...

Page 3: ...5 5 5 5 4 Multiplexing on PIO Controller C PIOC 5 6 5 5 5 Multiplexing on PIO Controller D PIOD 5 7 5 5 6 Multiplexing on PIO Controller E PIOE 5 8 Section 6 Connectors 6 1 6 1 Power Supply 6 1 6 2 RS...

Page 4: ...rm for the Atmel AT91SAM9M10 or AT91SAM9G45 microcontroller The kit is equipped with an AT91SAM9M10 chip which is a superset of the AT91SAM9G45 and therefore allows evaluating that reference as well T...

Page 5: ...DDR2 SDRAM NAND Flash NOR Flash not populated by default 1 2 Applicable Documents Table 1 1 Applicable Documents Reference Title Comments Atmel Literature n 6438 SAM9G45 Preliminary This document desc...

Page 6: ...ply Universal input AC DC power supply with US Europe and UK plug adapters One 3V Lithium Battery type CR1225 Cables One micro A B type USB cable One serial RS232 cable One RJ45 crossed cable A Welcom...

Page 7: ...sim ilar ESD protective device when handling the board in hostile ESD environments offices with synthetic carpet for example Avoid touching the component pins or any other metallic element on the boar...

Page 8: ...er convenience in case the user would like to exercise the date and time backup function of the SAM9M10 series devices when the board is switched off 3 3 DevStart The on board NAND Flash contains a SA...

Page 9: ...was when shipped by Atmel Follow the instructions if you deleted the contents of the NAND Flash and want to recover from this situation 3 5 Sample Code and Technical Support After boot up you can run...

Page 10: ...External Memory EBI0 EBI0 EBI1 1 8v EBI1 1 8v DDR2 SDRAM DDR2 SDRAM NAND FLASH Multim dia Cards Interface Multimedia Cards Interface MCI0 MCI0 SPI0 SPI0 MCI1 MCI1 Data Flash USART USART USB USB Host A...

Page 11: ...terface One SD SDIO MMC card slot 4 bit interface One Lithium Coin Cell Battery Retainer for 12 mm cell size memory backup usage 4 1 2 Board Interface Connection Ethernet using RJ45 connector J15 USB...

Page 12: ...USB HOST DEVICE USB Y6 TP2 J20 J7 R85 L11 JP15 J9 J8 TP4 J6 R185 Y7 BP3 C205 R181 R183 L22 L20 MN20 TP6 C203 C206 MN12 JP13 C201 C141 C143 JP14 JP17 JP18 MN14 C139 C146 C147 J10 L17 C198 C128 R71 R69...

Page 13: ...l The SAM9M10 G45 EK board is equipped with DDR2 LPDDR devices featuring 128 MB of DDR2 SDRAM memory 16Meg 8 4 The External Bus Interface EBI is connected to three kinds of memory devices One Parallel...

Page 14: ...D1 DQ5 D9 DQ6 B1 DQ7 B9 DQS B7 DQS A8 RDQS DM B3 RDQS NU A2 VDD H9 VDD L1 VDDL E1 VREF E2 VDDQ C9 VSS A3 VSS E3 VDDQ A9 VDD E9 RFU1 G1 RFU2 L3 CKE F2 CK E8 CK F8 CAS G7 RAS F7 WE F3 CS G8 VDDQ C1 VDD...

Page 15: ...H_D 0 15 JP9 JP9 R43 0R R43 0R C81 100nF C81 100nF C80 100nF C80 100nF MT47H64M8CF 3 DDR2 SDRAM MN8 MT47H64M8CF 3 DDR2 SDRAM MN8 A0 H8 A1 H3 A2 H7 A3 J2 A4 J8 A5 J3 A6 J7 A7 K2 A8 K8 A9 K3 A10 H2 BA0...

Page 16: ...VIN 5 VCC power and outputs a regulated 3 3 V to most other circuits on the board The 1 8 VDC Supply VDDIOM0 VDDIOM1 is generated by an adjustable LDO It is powered by VIN 5 VCC power and outputs a r...

Page 17: ...4 7u R20 1R R20 1R C22 1u C22 1u JP2 JP2 1 2 3 C1 100n C1 100n J1 3 J1 3 5 6 R13 100k R13 100k R10 100k R10 100k C15 2 2u C15 2 2u R12 1R R12 1R JP7 JP7 1 2 3 C18 100n C18 100n JP6 JP6 1 2 3 C25 1u C2...

Page 18: ...10u R16 10k R16 10k C3 10n C3 10n MN1 RT9186A MN1 RT9186A VIN 1 VIN 2 PGOOD 3 EN 4 GND 5 ADJ 6 VOUT 7 VOUT 8 EP 9 R2 100k R2 100k C16 10n C16 10n C5 10n C5 10n C4 33u C4 33u R6 12k R6 12k R4 47k R4 47...

Page 19: ...O TMS TCK NTRST NRST 3V3 3V3 3V3 NTRST RTCK TDI TMS TCK TDO NRST ICE INTERFACE R92 0R R92 0R J13 HTST 110 01 SM D J13 HTST 110 01 SM D 1 2 3 4 5 6 7 8 9 10 11 12 13 15 17 19 14 16 18 20 R94 0R DNP R94...

Page 20: ...n ports Two Host Ports Full speed OHCI and High speed EHCI One Device Port High speed USB Host Port0 is directly connected to the first UTMI transceiver The second Host Port Port1 is mul tiplexed with...

Page 21: ...Ethernet interface provides two selectable modes MII or RMII Reduced MII for 100Base TX or 10Base TX The MII and RMII interfaces are capable of both 10Mb s and 100Mb s data rates as described in the...

Page 22: ...clock REF_CLK ERX0 ERX1 ERX 0 1 receive data RXD 0 1 ERX 0 1 receive data RXD 0 1 ERX2 ERX3 ERX 2 3 receive data RXD 2 3 NC NC ERXER ERXER receive error RXER RXD 4 RPTR NODE ERXER receive error RPTR N...

Page 23: ...2 DVDD 41 DGND 44 DGND 15 AGND 5 AGND 6 LED2 OP2 13 LED1 OP1 12 LED0 OP0 11 TXD3 17 TXD2 18 TXD0 20 TXD1 19 TX_CLK ISOLATE 22 RXD0 PHYAD0 29 RXD1 PHYAD1 28 RXD2 PHYAD2 27 RXD3 PHYAD3 26 CRS PHYAD4 35...

Page 24: ...o Interface The SAM9M10 G45 EK includes a WM9711L AC97 CODEC for digital sound input and output This interface includes audio jacks for MIC input J9 line audio input J8 headphone line output J7 and a...

Page 25: ...4 2 5 R79 8 2K R79 8 2K L7 220ohmat100MHz L7 220ohmat100MHz 1 2 JP17 DNP JP17 DNP 1 2 R75 0R DNP R75 0R DNP C126 100u 6 3V C126 100u 6 3V L9 220ohmat100MHz L9 220ohmat100MHz 1 2 C138 100n C138 100n C1...

Page 26: ...B1 G3 LCDDOTCK R5 R0 B2 HSYNC VSYNC TWDO TWCK0 L21 2200R L21 2200R 1 2 C197 100n C197 100n MN20 CH7024B MN20 CH7024B D7 1 D8 2 D9 3 D10 4 D11 5 D12 6 D13 7 D14 8 D15 9 D16 10 D17 11 D18 12 D19 13 D20...

Page 27: ...crete LEDs LED Description Comment D1 Green LED User software controlled D2 Green LED User software controlled D3 Red LED User software controlled D4 Yellow LED Indicates transmission or reception via...

Page 28: ...h speed 8 bit multimedia interfaces MMC MMCPlus v4 1 The first interface is used as an 8 bit interface MCI1 connected to a CE ATA connector footprint and an 8 bit SD MMC card slot The second interface...

Page 29: ...erter It is powered directly by the VIN 5 VCC power the control for the back light voltages is separated from the main board voltages due to the specific voltage requirements of the LCD panel PA26 PA2...

Page 30: ...R R172 0R R184 DNP R184 DNP RR53A RR53A 1 8 RR49C RR49C 3 6 R155 DNP R155 DNP RR48A RR48A 1 8 RR49D RR49D 4 5 RR53C RR53C 3 6 RR52A RR52A 1 8 C209 DNP C209 DNP C210 DNP C210 DNP R157 DNP R157 DNP R178...

Page 31: ...lick Joystick One touch 5 way switching Normally open momentary contacts Push down to select in any position Figure 4 20 Push Buttons 4 2 15 Expansion Slot GPIO1 GPIO2 LCD signals PIO E are routed to...

Page 32: ...3 LCDDOTCK LCDHSYNC LCDVSYNC IMAGE SENSOR CONNECTOR CONNECTOR EXTENSION FOR LARGE LCD AD1Xm AD3Ym AD2Yp AD0Xp GPIO2 GPIO1 2 L R T C 1 L R T C J17 HDR_2x15_SMT J17 HDR_2x15_SMT 1 2 3 4 5 6 7 8 9 10 11...

Page 33: ...uate the MII mode the user has to unsolder R99 and solder R100 R103 to R105 R108 to R110 R112 R114 C174 C175 Y5 Table 5 1 JTAG ICE Configuration Designation Default Setting Feature R91 Not populated D...

Page 34: ...JP4 Opened Forces power on To use the software shutdown control JP4 must be opened 3V battery backup must be present and JP7 jumper set in position 1 2 JP5 1 2 JP5 1 2 VDDIOM0 1V8 2 3 External power t...

Page 35: ...neous Configuration Designation Default Setting Feature R34 N P JTAGSEL R35 P Connect TSADVREF to VDDANA may be used for specific filtering R36 P Connect GNDANA to GND may be used for specific filteri...

Page 36: ...X1 Ethernet RMII Receive data 1 VDDIOP0 PA14 ETXEN Ethernet RMII Transmit enable VDDIOP0 PA15 ERXDV Ethernet RMII Receive data valid VDDIOP0 PA16 ERXER Ethernet RMII Receive Error VDDIOP0 PA17 ETXCK E...

Page 37: ...Data 10 VDDIOP2 PB11 TWCK1 ISI_D11 Image Sensor Data 11 VDDIOP2 PB12 DRXD DBGU Receive Data VDDIOP0 PB13 DTXD DBGU Transmit Data VDDIOP0 PB14 SPI1_MISO Joystick Left VDDIOP0 PB15 SPI1_MOSI CTS0 Joysti...

Page 38: ...E CLE NAND Flash VDDIOM1 PC6 A23 VDDIOM1 PC7 A24 VDDIOM1 PC8 CFCE1 Ready Busy NAND Flash VDDIOM1 PC9 CFCE2 RTS2 VDDIOM1 PC10 NCS4 CFCS0 TCLK2 VDDIOM1 PC11 NCS5 CFCS1 CTS2 VDDIOM1 PC12 A25 CFRNW VDDIOM...

Page 39: ...VDDIOP0 PD12 TK1 PCK0 CTRL1 Image Sensor Interface VDDIOP0 PD13 RK1 CTRL2 Image Sensor Interface VDDIOP0 PD14 TF1 GPIO1 Large LCD connector VDDIOP0 PD15 RF1 GPIO2 Large LCD connector VDDIOP0 PD16 RTS...

Page 40: ...DDIOP1 PE10 LCDD3 LCDD5 LCD Red3 VDDIOP1 PE11 LCDD4 LCDD6 LCD Red4 VDDIOP1 PE12 LCDD5 LCDD7 LCD Red5 VDDIOP1 PE13 LCDD6 LCDD10 LCD Red6 VDDIOP1 PE14 LCDD7 LCDD11 LCD Red7 VDDIOP1 PE15 LCDD8 LCDD12 LCD...

Page 41: ...via the external power supply jack J2 shown in Figure 6 1 The positive pole must be on J2 center pin Figure 6 1 Power Supply Connector J2 6 2 RS232 Connector with RTS CTS Handshake Support Connector...

Page 42: ...TXD TRANSMITTED DATA RS232 serial data output signal 3 RXD RECEIVED DATA RS232 serial data input signal 5 GND GROUND 7 RTS READY TO SEND Active positive RS232 input signal 8 CTS CLEAR TO SEND Active p...

Page 43: ...e A connector J12 Table 6 4 Ethernet RJ45 Connector J15 Signal Descriptions Pin Mnemonic Pin Mnemonic 1 TxData DIFFERENTIAL OUTPUT PLUS 2 Txdata DIFFERENTIAL OUTPUT MINUS 3 RxData DIFFERENTIAL INPUT P...

Page 44: ...nnector J13 is the JTAG ICE connector A SAM ICE connector is a 20 way Insulation Displacement Connector IDC keyed box header 2 54 mm male that mates with IDC sockets mounted on a ribbon cable Figure 6...

Page 45: ...get CPU 6 GND Common ground 7 TMS TEST MODE SELECT JTAG mode set input of target CPU This pin should be pulled up on the target Typically connected to TMS on target CPU Output signal that sequences th...

Page 46: ...1 Apr 10 6 8 SD MMC MCI0 Connector J6 is the SD MMC connector Figure 6 8 SD MMC0 Connector J6 Table 6 8 SD MMC0 Connector J6 Signal Descriptions Pin Mnemonic Pin Mnemonic 1 RSV DAT3 2 CDA 3 GND 4 VCC...

Page 47: ...10 6 9 SD MMC MCI1 Connector J5 is the SD MMC connector Figure 6 9 SD MMC1 Connector J5 Table 6 9 SD MMC1 Connector J5 Signal Descriptions Pin Mnemonic Pin Mnemonic 1 RSV DAT3 2 CMD 3 GND 4 VCC 5 CLK...

Page 48: ...is the Line In connector Connector J9 is the Microphone Input Connector JP15 is the Speaker Output connector Figure 6 10 Audio Connector J7 J8 J9 Table 6 10 J7 J8 J9 Signal Description Pin Mnemonic 1...

Page 49: ...Connector J17 Signal Descriptions Pin Mnemonic Pin Mnemonic 1 VCC 3v3 2 Gnd 3 VCC 3v3 4 Gnd 5 Ctrl1 6 Ctrl2 7 SCL 8 SDA 9 Gnd 10 ISI_MCK 11 Gnd 12 ISI_VSYNC 13 Gnd 14 ISI_HSYNC 15 Gnd 16 ISI_PCK 17 G...

Page 50: ...y Devices 6 13 1 TFT LCD Connector J24 is the TFT LCD connector Figure 6 13 TFT LCD Connector J24 Table 6 13 Video Connector J20 Signal Description Pin Mnemonic Signal description 1 Center Composite v...

Page 51: ...n Mnemonic Pin Mnemonic 1 PE8 RED Data Signal 2 PE7 RED Data Signal LSB 3 PE10 RED Data Signal 4 PE9 RED Data Signal 5 PE12 RED Data Signal 6 PE11 RED Data Signal 7 PE14 RED Data Signal MSB 8 PE13 RED...

Page 52: ...Connector J18 Signal Description for an LCD Extension Pin Mnemonic Pin Mnemonic 1 XM AD1XM 2 XP AD0XP 3 YM AD3YM 4 YP AD2YP 5 GND 0V 6 GND 0V 7 PD25 PD25 8 PD24 PD24 9 PD27 PD27 10 PD26 PD26 11 PD19 P...

Page 53: ...tics 7 1 Schematics This section contains the following schematics Top Level view block architecture of the design Power Supply SAM Processor Bus impedance adaptor Main memory EBI memory MCI TWI Audio...

Page 54: ...I0_CDA MCI0_DA0 MCI0_DA2 MCI0_DA1 MCI0_DA3 TXD2 RXD2 TXD3 RXD3 TXD0 TXD1 RXD0 RXD1 TX_EN RX_DV RX_ER TX_CLK MDC TWDO TWCK0 MCI1_CDA MCI1_DA0 MCI1_DA1 MCI1_DA2 MCI1_DA3 MCI1_DA4 TX_ER MCI1_DA5 RX_CLK M...

Page 55: ...1 J1 1 1 2 TP3 TP3 BP5 BP5 C2 4 7u C2 4 7u R9 100k R9 100k C36 10n C36 10n R18 12k R18 12k C11 1u C11 1u JP1 JP1 1 2 3 C26 1u C26 1u D2 Green D2 Green 1 2 R11 100k R11 100k C23 10u C23 10u C34 10n C34...

Page 56: ...PE27 LCDD20 K7 PE28 LCDD21 K8 PE29 LCDD22 L3 PE30 LCDD23 L2 PE31 PWM2 PCK1 L4 C65 100n C65 100n C60 100n C60 100n MN5C MN5C PC0 DQM2 A8 PC1 DQM3 E9 PC2 A19 B8 PC3 A20 C8 PC4 A21 NANDALE F9 PC5 A22 NA...

Page 57: ...I1 6 BA0_EBI1 6 BA1_EBI1 6 CS_EBI1 6 WE_EBI1 6 RAS_EBI1 6 CAS_EBI1 6 DQM0_EBI1 6 DQM1_EBI1 6 DQS0_EBI1 6 DQS1_EBI1 6 EBI1_FLASH_D 0 15 6 DDR_A 0 13 5 EBI1_SDCKE 3 EBI1_SDCK 3 EBI1_NSDCK 3 EBI1_NCS1 SD...

Page 58: ...AM9M10 G45 EK 5 12 A2 11 FEB 10 Derek PP EBI0_DDR2 05 Feb 10 08 apr 10 PP A2 C78 100n C78 100n C71 100n C71 100n C80 100n C80 100n C72 100n C72 100n C81 100n C81 100n C69 100n C69 100n DDR2 SDRAM MN6...

Page 59: ...6 12 A2 11 FEB 10 Derek PP EBI1_MEMORY 05 Feb 10 08 apr 10 PP A2 REV DATE MODIF DES DATE VER SCALE 1 1 REV SHEET This agreement is our property Reproduction and publication without our written author...

Page 60: ...0 Derek PP MCI TWI 05 Feb 10 08 apr 10 PP A2 REV DATE MODIF DES DATE VER SCALE 1 1 REV SHEET This agreement is our property Reproduction and publication without our written authorization shall expose...

Page 61: ...0R C144 10u 10V C144 10u 10V C134 10u 10V C134 10u 10V C131 100n C131 100n JP15 DNP JP15 DNP 1 2 R69 0R R69 0R C136 100n C136 100n C137 22p C137 22p J7 STEREO_3 5mm J7 STEREO_3 5mm 1 3 4 2 5 C140 10u...

Page 62: ...EB 10 Derek PP SERIAL INTERFACES 05 Feb 10 08 apr 10 PP A2 R92 0R R92 0R C161 100n C161 100n C1 V VCC C1 C2 C2 V T T R R GND MN15 ADM3202ARNZ C1 V VCC C1 C2 C2 V T T R R GND MN15 ADM3202ARNZ 1 16 3 4...

Page 63: ...182 100n C184 100n C184 100n R98 10k R98 10k C181 10u 10V C181 10u 10V R121 470R R121 470R C183 100n C183 100n L15 2200R L15 2200R 1 2 MN18 DM9161AEP MN18 DM9161AEP TX_ER TXD4 16 COL RMII 36 MDC 24 RX...

Page 64: ...11 FEB 10 Derek PP DISPLAY 05 Feb 10 08 apr 10 PP A2 REV DATE MODIF DES DATE VER SCALE 1 1 REV SHEET This agreement is our property Reproduction and publication without our written authorization shall...

Page 65: ...12 A2 11 FEB 10 Derek PP LCD ISI VIDEO INTERFACE 05 Feb 10 08 apr 10 PP A2 REV DATE MODIF DES DATE VER SCALE 1 1 REV SHEET This agreement is our property Reproduction and publication without our writt...

Page 66: ...B Main edits Most Figures updated Hyperlinks to PDFs updated Serial Synchronous Controller SSC removed JTAG added RJ45 crossed cable added Dimensions updated Most configuration tables with LEDs pins a...

Page 67: ...LIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTY OF MERCHANTABILITY FITNESS FOR A PARTICULAR PURPOSE OR NON INFRINGEMENT IN NO EVENT SHALL ATMEL BE...

Page 68: ...401 Building No 5 JiuGe Business Center Lane 2301 Yishan Rd Minhang District Shanghai China Sales Direct 86 21 6401 6692 Email amall ameya360 com QQ 800077892 Skype ameyasales1 ameyasales2 Customer Se...

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