background image

5

5

4

4

3

3

2

2

1

1

D

D

C

C

B

B

A

A

PA5

COM5

PA10

SEG4

PA7

SEG1

PA3

COM3

PA19

SEG13

PA16

SEG10

PA21

SEG15

PA17

SEG11

PA15

SEG9

PA0

COM0

PA18

SEG12

PA24

SEG18

PA20

SEG14

PA23

SEG17

PA22

SEG16

PA9

SEG3

PA12

SEG6

PA6

SEG0

PA1

COM1

PA8

SEG2

PA14

SEG8

PA4

COM4

PA13

SEG7

PA11

SEG5

PA25

SEG19

PA2

COM2

PB2

SEG22

PB1

SEG21

PB5

SEG25

PB4

SEG24

PB3

SEG23

PB0

SEG20

PB7

SEG27

PB13

SEG33

PB8

SEG28

PB12

SEG32

PB9

SEG29

PB17

SEG37

PB16

SEG36

PB10

SEG30

PB6

SEG26

PB15

SEG35

PB14

SEG34

PB11

SEG31

PB21

COM7

PB23

COM9

PB19

SEG39

PB22

COM8

PB20

COM6

PB18

SEG38

PC2
PC3

PC0

PC4

PC1

PC10
PC11

PC25
PC26
PC27
PC28
PC29

PC5
PC6
PC7
PC8
PC9

PC12
PC13
PC14
PC15
PC16
PC17
PC18
PC19
PC20
PC21
PC22
PC23
PC24

PC1

PC4

PC3

PC28

PC29

PC23

PC21

PC17

PC25
PC27

PC3

PC1

PC13

PC11

PC7

PC15

PC5

PC9

PC19

PC24
PC26

PC18

PC16

PC22

PC20

PC4

PC2

PC0

PC14

PC12

PC10

PC8

PC6

AD3
AD2
AD1
AD0

AD1
AD3

AD0
AD2

ERASE

C

O

M

4

C

O

M

3

C

O

M

2

C

O

M

1

C

O

M

0

S

E

G

0

S

E

G

2

S

E

G

4

S

E

G

6

S

E

G

8

S

E

G

1

0

S

E

G

1

2

S

E

G

2

2

S

E

G

2

4

S

E

G

2

6

S

E

G

2

8

S

E

G

3

0

S

E

G

3

2

S

E

G

3

4

S

E

G

3

6

S

E

G

1

4

S

E

G

1

6

S

E

G

1

8

S

E

G

2

0

C

O

M

9

S

E

G

1

S

E

G

3

S

E

G

5

S

E

G

7

S

E

G

9

S

E

G

1

1

S

E

G

1

3

C

O

M

5

C

O

M

6

C

O

M

7

C

O

M

8

S

E

G

2

3

S

E

G

2

5

S

E

G

2

7

S

E

G

2

9

S

E

G

3

1

S

E

G

3

3

S

E

G

3

5

S

E

G

3

7

S

E

G

1

5

S

E

G

1

7

S

E

G

1

9

S

E

G

2

1

S

E

G

3

8

S

E

G

3

9

PC15

AD3

PC0

PC2

PC[0..29]

PB[0..23]

PA[0..25]

AD[0..3]

ERASE

AD[0..3]

VCC

GND

GND

VCC

GND

VCC

GND

VCC

VCC

GND

GND

GND

REV

DATE

MODIF.

DES.

DATE

VER.

SCALE

1/1

REV.

SHEET

This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.

INIT EDIT

A

AT91SAM7L-STK

3

4

A

XX-XXX-XX

PP

XXX

LCD, KBD

17MAR08

REV

DATE

MODIF.

DES.

DATE

VER.

SCALE

1/1

REV.

SHEET

This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.

INIT EDIT

A

AT91SAM7L-STK

3

4

A

XX-XXX-XX

PP

XXX

LCD, KBD

17MAR08

REV

DATE

MODIF.

DES.

DATE

VER.

SCALE

1/1

REV.

SHEET

This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.

INIT EDIT

A

AT91SAM7L-STK

3

4

A

XX-XXX-XX

PP

XXX

LCD, KBD

17MAR08

VCC/VBAT MONITOR

UP

OK

RIGHT

LEFT

DOWN

OK
UP
RIGHT

LEFT

DOWN

CTS1/PWM2_WKUP0

DCD1/TIOA2_WKUP1

DTR1/TIOB2_WKUP2

DSR1/TCLK1_WKUP3

RI1/TCLK2_WKUP4

IRQ1/NPCS2_WKUP5

NPCS1/PCK2_WKUP6

PWM0/TIOA0

PWM1/TIOB0

PWM2/SCK0

TWD/NPCS3

TWCK/TCLK0_WKUP7

RXD0/NPCS3_WKUP8

TXD0/PCK0_WKUP9

RTS0/ADTRG_WKUP10

CTS0/PWM3_WKUP11

DRXD/NPCS1

/DTXD/MPCS2

NPCS0/PWM0

MISO/PWM1

MOSI/PWM2

SPCK/PWM3

MPCS3/TIOA1

PCK0/TIOB1

RXD1/PCK1

TXD1/PCK2

RTS0/FIQ_WKUP12

NPCS2/IRQ0_WKUP13

SCK1/PWM0_WKUP14

RTS1/PWM1_WKUP15

PCK0/NPCS3

NPCS3
NPCS2
NPCS1
RTS1
RTS0
DTR1
PWM0
PWM1
PWM2
PWM3
NPSC1/PCK1

R11

NOT POPULATED

R11

NOT POPULATED

BP4

3-1437565-0

BP4

3-1437565-0

LCD1

LCD_GS08001AA

LCD1

LCD_GS08001AA

C

O

M

5

5

0

C

O

M

4

4

9

C

O

M

3

4

8

C

O

M

2

4

7

C

O

M

1

4

6

S

E

G

1

4

5

S

E

G

3

4

4

S

E

G

5

4

3

S

E

G

7

4

2

S

E

G

9

4

1

S

E

G

1

1

4

0

S

E

G

1

3

3

9

S

E

G

1

5

3

8

S

E

G

1

7

3

7

S

E

G

1

9

3

6

S

E

G

2

1

3

5

S

E

G

2

3

3

4

S

E

G

2

5

3

3

S

E

G

2

7

3

2

S

E

G

2

9

3

1

S

E

G

3

1

3

0

S

E

G

3

3

2

9

S

E

G

3

5

2

8

S

E

G

3

7

2

7

S

E

G

3

9

2

6

S

E

G

4

0

2

5

S

E

G

3

8

2

4

C

O

M

6

1

C

O

M

7

2

C

O

M

8

3

C

O

M

9

4

C

O

M

1

0

5

S

E

G

2

6

S

E

G

4

7

S

E

G

6

8

S

E

G

8

9

S

E

G

1

0

1

0

S

E

G

1

2

1

1

S

E

G

1

4

1

2

S

E

G

1

6

1

3

S

E

G

1

8

1

4

S

E

G

2

0

1

5

S

E

G

2

2

1

6

S

E

G

2

4

1

7

S

E

G

2

6

1

8

S

E

G

2

8

1

9

S

E

G

3

0

2

0

S

E

G

3

2

2

1

S

E

G

3

4

2

2

S

E

G

3

6

2

3

BP1

3-1437565-0

BP1

3-1437565-0

BP5

3-1437565-0

BP5

3-1437565-0

JS1

JS1

BP2

3-1437565-0

BP2

3-1437565-0

Q1

FDV304P

Q1

FDV304P

1

3

2

R9

10K

R9

10K

J6

J6

1

2

3

4

5

6

7

8

9

10

11

12

13
15
17
19

14
16
18
20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

BP3

3-1437565-0

BP3

3-1437565-0

R10

NOT POPULATED

R10

NOT POPULATED

R8

10K

R8

10K

Summary of Contents for AT91SAM7L-STK

Page 1: ...6409A ATARM 30 Jun 08 AT91SAM7L STK Rev A Starter Kit User Guide ...

Page 2: ...1 2 AT91SAM7L STK Rev A Starter Kit User Guide 6409A ATARM 30 Jun 08 ...

Page 3: ...owering Up the Board 2 2 2 5 Getting Started 2 2 2 6 AT91SAM7L STK Rev A Block Diagram 2 3 Section 3 Board Description 3 1 3 1 AT91SAM7L64 128 Microcontroller 3 1 3 2 AT91SAM7L64 128 Block Diagram 3 3 3 3 Memory 3 4 3 4 Clock Circuitry 3 4 3 5 Reset Circuitry 3 4 3 6 Shut Down controller 3 4 3 7 Power Supply Circuitry 3 4 3 8 User Interface 3 4 3 9 Debug Interface 3 4 3 10 Expansion Slot 3 4 3 11 ...

Page 4: ...Table of Contents Continued ii AT91SAM7L STK Rev A Starter Kit User Guide 6409A ATARM 30 Jun 08 6 1 Q1 Footprint Incorrect 6 1 6 2 MAX3318 Control Pull ups 6 2 Section 7 Revision History 7 1 ...

Page 5: ...rm 1 2 Deliverables The AT91SAM7L STK rev A package contains the following items An AT91SAM7L STK rev A board Two AAA batteries 1 3 The AT91SAM7L STK Rev A Starter Board The board is equipped with an AT91SAM7L128 128 lead LQFP package together with the following One DBGU serial communication port One ZIGBEE extension connector One JTAG ICE debug interface Five user input push buttons One WakeUP in...

Page 6: ...otective anti static package The board must not be subjected to high electrostatic potentials A grounding strap or similar protective device should be worn when handling the board Avoid touching the component pins or any other metallic element 2 2 Requirements In order to set up the AT91SAM7L STK rev A starter board the following items are needed The AT91SAM7L STK rev A starter board Two AAA batte...

Page 7: ...TK Rev A Board Layout 2 4 Powering Up the Board The AT91SAM7L STK rev A requires 3 0V 2 2V 3 6V DC input The power is supplied to the board via 2 AAA batteries or 3 0V VCC pads 2 5 Getting Started Please refer to the AT91SAM product pages on the Atmel web site for the most up to date information on getting started with the AT91SAM7L STK rev A ...

Page 8: ...6 AT91SAM7L STK Rev A Block Diagram Figure 2 2 AT91SAM7L STK Block Diagram PC 0 29 PB 0 23 PA 0 25 PC 0 29 AD 0 3 PC 0 29 AD 0 3 PA 0 25 PB 0 23 SHEET 2 SHEET 4 SHEET 3 8 56 Processor Processor PB 0 23 PA 0 25 PC 0 29 AD 0 3 ERASE LCD KBD LCD KBD PC 0 29 PB 0 23 PA 0 25 AD 0 3 ERASE Interfaces Interfaces PC 0 29 ...

Page 9: ...Bus Increases Performance in ARM and Thumb Mode with 128 bit Wide Memory Interface Internal High speed SRAM Single cycle Access at Maximum Speed 6 kbytes 2 Kbytes Directly on Main Supply that Can Be Used as Backup SRAM 4 Kbytes in the Core Memory Controller MC Enhanced Embedded Flash Controller Abort Status and Misalignment Detection Reset Controller RSTC Based on Brownout Reset and Low power Fact...

Page 10: ...DA Infrared Modulation Demodulation Support for ISO7816 T0 T1 Smart Card Hardware Handshaking RS485 Support Manchester Encoder Decoder Full Modem Line Support on USART1 One Master Slave Serial Peripheral Interface SPI 8 to 16 bit Programmable Data Length Four External Peripheral Chip Selects One Three channel 16 bit Timer Counter TC Three External Clock Inputs Two Multi purpose I O Pins per Channe...

Page 11: ...O PIO APB Embedded Flash Controller AD0 AD1 AD2 AD3 ADTRG 11 Channels PDC PDC SPI PDC ADC ADVREF TC0 TC1 TC2 TWD TWCK TWI XIN XOUT VDDIO1 PWMC PWM0 PWM1 PWM2 PWM3 1 8 V Voltage Regulator GND VDDOUT VDDCORE VDDIO1 VDDCORE Fast Flash Programming Interface ERASE PGMD0 PGMD15 PGMNCMD PGMEN0 PGMEN2 PGMRDY PGMNVALID PGMNOE PGMCK PGMM0 PGMM3 VDDIO2 TST DBGU PDC PDC PIO PIT WDT System Controller VDDIO1 SA...

Page 12: ...h button 3 7 Power Supply Circuitry For dynamic power consumption the AT91SAM7L64 128 consumes a maximum of 30 mA on VCC at full speed 36MHz On board 2 AAA batteries or 3V DC input power pad directly supplied to VCC 3 8 User Interface Five user input push buttons four direction buttons and one ok button 3 9 Debug Interface 20 pin JTAG ICE interface connector One Serial interface DBGU COM Port via ...

Page 13: ...L SEG1 VDDIO2 PA8 Segment LCD PANEL SEG2 VDDIO2 PA9 Segment LCD PANEL SEG3 VDDIO2 PA10 Segment LCD PANEL SEG4 VDDIO2 PA11 Segment LCD PANEL SEG5 VDDIO2 PA12 Segment LCD PANEL SEG6 VDDIO2 PA13 Segment LCD PANEL SEG7 VDDIO2 PA14 Segment LCD PANEL SEG8 VDDIO2 PA15 Segment LCD PANEL SEG9 VDDIO2 PA16 Segment LCD PANEL SEG10 VDDIO2 PA17 Segment LCD PANEL SEG11 VDDIO2 PA18 Segment LCD PANEL SEG12 VDDIO2 ...

Page 14: ...VDDIO2 PB8 Segment LCD PANEL SEG28 VDDIO2 PB9 Segment LCD PANEL SEG29 VDDIO2 PB10 Segment LCD PANEL SEG30 VDDIO2 PB11 Segment LCD PANEL SEG31 VDDIO2 PB12 NPCS3 Segment LCD PANEL SEG32 VDDIO2 PB13 NPCS2 Segment LCD PANEL SEG33 VDDIO2 PB14 NPCS1 Segment LCD PANEL SEG34 VDDIO2 PB15 RTS1 Segment LCD PANEL SEG35 VDDIO2 PB16 RTS0 Segment LCD PANEL SEG36 VDDIO2 PB17 DTR1 Segment LCD PANEL SEG37 VDDIO2 PB...

Page 15: ...M0 TIOA0 MAX3318E FORCEOFF VDDIO1 PC8 PWM1 TIOB0 ZIGBEE RSIN VDDIO1 PC9 PWM2 SCK0 ZIGBEE SLP_IR VDDIO1 PC10 TWD NPCS3 VDDIO1 PC11 TWCK TCLK0 VDDIO1 PC12 RXD0 NPCS3 MAX3318E FORCEON VDDIO1 PC13 TXD0 PCK0 MAX3318E INVALID VDDIO1 PC14 RTS0 ADTRG MAX3318E READY VDDIO1 PC15 CTS0 PWM3 VCC VBAT MONITOR ENABLE VDDIO1 PC16 DRXD NPCS1 MAX3318E DRXD VDDIO1 PC17 DTXD NPCS2 MAX3318E DTXD VDDIO1 PC18 NPCS0 PWM0...

Page 16: ...onsumption measurement By default it is closed To use this fea ture the user has to open the strap and insert an ammeter Table 4 1 Designation Default Setting Feature J6 pins 39 40 Opened Closed for internal flash erase 1 J8 Closed VCC jumper 2 SD1 Opened Disables VDDIO2 to VDDLCD connection SD2 2 3 Selects VCC or VDD3V6 to VDDLCD SD3 Closed Enables VDDOUT applying to VDDCORE SD4 2 3 Selects VDDIN...

Page 17: ...AT91SAM7L STK Rev A Starter Kit User Guide 5 1 6409A ATARM 30 Jun 08 Section 5 Schematics This section contains the following schematics Top Level Interfaces LCD KBD Processor ...

Page 18: ...ent is our property Reproduction and publication without our written authorization shall expose offender to legal proceedings INIT EDIT A AT91SAM7L STK 1 4 A XX XXX XX PP XXX Top level 17MAR08 REV DATE MODIF DES DATE VER SCALE 1 1 REV SHEET This agreement is our property Reproduction and publication without our written authorization shall expose offender to legal proceedings INIT EDIT A AT91SAM7L ...

Page 19: ...zation shall expose offender to legal proceedings INIT EDIT A AT91SAM7L STK 2 4 A XX XXX XX PP XXX Interfaces 17MAR08 ZIGBEE INTERFACE Note Pin 1 on Zigbee board RZ502 matches pin 2 on this connector MISO SPCK NPSC1 RSTN IRQ1 MOSI SLP_TR SERIAL DEBUG PORT Only for AT86RF230Rev A connexion not required for Rev B on DTXD DRXD TX RX TP2 TESTPOINT TP2 TESTPOINT TP1 TESTPOINT TP1 TESTPOINT C1 100NF C1 ...

Page 20: ...thout our written authorization shall expose offender to legal proceedings INIT EDIT A AT91SAM7L STK 3 4 A XX XXX XX PP XXX LCD KBD 17MAR08 REV DATE MODIF DES DATE VER SCALE 1 1 REV SHEET This agreement is our property Reproduction and publication without our written authorization shall expose offender to legal proceedings INIT EDIT A AT91SAM7L STK 3 4 A XX XXX XX PP XXX LCD KBD 17MAR08 VCC VBAT M...

Page 21: ...NF C18 100NF TP9 TESTPOINT TP9 TESTPOINT R21 NOT POPULATED R21 NOT POPULATED R14 180R R14 180R R16 100K R16 100K C25 100NF C25 100NF R18 100K R18 100K SD4 SOLDER DROP 3 pins SD4 SOLDER DROP 3 pins 1 2 3 R17 100K R17 100K C21 100NF C21 100NF C14 10NF C14 10NF JS2 JS2 R15 100K R15 100K C29 6V3 10µF C29 6V3 10µF BP7 3 1437565 0 BP7 3 1437565 0 XC1 32 768 kHz CM415 32 768KDZFB F XC1 32 768 kHz CM415 3...

Page 22: ...ome applications Q1 has to be removed and soldered bottom up taking care to apply the correct polarity Additionally a 100 KΩ pull up resistor is needed across gate and source 6 2 MAX3318 Control Pull ups The default configuration of the MAX3318 is ON This leads to extra power consumption discharging the batteries when the AT91SAM7L128 enters OFF mode or does not even drive PC7 and PC12 to put the ...

Page 23: ...AT91SAM7L STK Rev A Starter Kit User Guide 7 1 6409A ATARM 30 Jun 08 Section 7 Revision History Doc Rev Comments Change Request Ref 6409A First issue ...

Page 24: ...RRANTY RELATING TO ITS PRODUCTS INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTY OF MERCHANTABILITY FITNESS FOR A PARTICULAR PURPOSE OR NON INFRINGEMENT IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT INDIRECT CONSEQUENTIAL PUNITIVE SPECIAL OR INCIDEN TAL DAMAGES INCLUDING WITHOUT LIMITATION DAMAGES FOR LOSS OF PROFITS BUSINESS INTERRUPTION OR LOSS OF INFORMATION ARISING OUT OF THE USE OR INABIL...

Reviews: