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6174B–ATARM–07-Nov-05
AT91FR40162S Preliminary
17.10.9
USART Baud Rate Generator Register
Name:
US_BRGR
Access Type:
Read/Write
Reset Value:
0
Offset:
0x20
• CD: Clock Divisor
This register has no effect if Synchronous Mode is selected with an external clock.
Notes:
1. Clock divisor bypass (CD = 1) must not be used when internal clock MCK is selected (USCLKS = 0).
2. In Synchronous Mode, the value programmed must be even to ensure a 50:50 mark:space ratio.
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
–
–
–
–
–
–
15
14
13
12
11
10
9
8
CD
7
6
5
4
3
2
1
0
CD
CD
Effect
0
Disables Clock
1
Clock Divisor Bypass
2 to 65535
Baud Rate (Asynchronous Mode) = Selected Clock / (16 x CD)
Baud Rate (Synchronous Mode) = Selected Clock / CD
