4
6320B–ATARM–05-Nov-07
Application Note
3.3
Invalid Block Identification
Before shipping, every NAND Flash device is tested with specific test patterns under different
voltage and temperature conditions in order to identify memory locations containing errors.
When errors are detected, the block to which the invalid memory location belongs is marked as
an “Invalid Block”.
All device locations are erased (FFh for 8-bit devices, FFFFh for 16-bit devices) except locations
where the invalid block information is written.
As illustrated above in
,
, and
, the bad block Informa-
tion is located in the first byte (8-bit devices) or first half word (16-bit devices) in the spare area
for Large Page devices and in the sixth byte (8-bit devices) or sixth half word (16-bit devices) in
the spare area of Small Page devices.
Manufacturers make sure that every invalid block has non-FFh (8-bit devices) or non-FFFFh
(16-bit devices) data in the bad block information location.
Since invalid block information (located in the spare area) written by the manufacturer is not
write/erase protected, it can be lost and will be almost impossible to recover. In order to prevent
loosing this information, it is highly recommended to proceed to a block status mapping before
any write or erase operation.
The flow chart below describes how this can be done by software.
Figure 3-5.
Bad Block Identification Flow Chart
Important Note: Any intentional erasure of the original invalid block information is prohibited.
Start
Set Block Address = 0
Data = FFh
or FFFFh ?
Last Block ?
End
Update
Invalid Block(s) Table
Increment Block Address
No
No
Yes
Yes
Point to Bad Block Information
location
Create
Invalid Block(s) Table
