21
3591A–FLASH–12/05
AT49BV160D(T)
33. AC Read Waveforms
(1)(2)(3)(4)
Notes:
1. CE may be delayed up to t
ACC
- t
CE
after the address transition without impact on t
ACC
.
2. OE may be delayed up to t
CE
- t
OE
after the falling edge of CE without impact on t
CE
or by t
ACC
- t
OE
after an address change
without impact on t
ACC
.
3. t
DF
is specified from OE or CE, whichever occurs first (CL = 5 pF).
4. This parameter is characterized and is not 100% tested.
32. AC Read Characteristics
Symbol
Parameter
AT49BV160D(T)-70
Units
Min
Max
t
RC
Read Cycle Time
70
ns
t
ACC
Address to Output Delay
70
ns
t
CE
(1)
CE to Output Delay
70
ns
t
OE
(2)
OE to Output Delay
0
20
ns
t
DF
(3)(4)
CE or OE to Output Float
0
25
ns
t
OH
Output Hold from OE, CE or Address,
whichever occurred first
0
ns
t
RO
RESET to Output Delay
100
ns
OUTPUT
VALID
OUTPUT
HIGH Z
RESET
OE
t
OE
t
CE
ADDRESS VALID
t
DF
t
OH
t
ACC
t
RO
CE
ADDRESS
t
RC
