583
32072H–AVR32–10/2012
AT32UC3A3
In SPI slave mode, a low level on NSS for at least one bit period will allow the slave to initiate a
transmission or reception. The Underrun Error bit (CSR.UNRE) is set if a character must be sent
while THR is empty, and TXD will be high during character transmission, as if 0xFF was being
sent. An interrupt request is generated if the Underrun Error bit in the Interrupt Mask Register
(IMR.UNRE) is set. If a new character is written to THR it will be sent correctly during the next
transmission slot. Writing a one to CR.RSTSTA will clear CSR.UNRE. To ensure correct behav-
ior of the receiver in SPI slave mode, the master device sending the frame must ensure a
minimum delay of one bit period in between each character transmission.
25.6.15.6
Receiver Time-out
Receiver Time-outs are not possible in SPI mode as the Baud Rate Clock is only active during
data transfers.
25.6.16
Manchester Encoder/Decoder
Writing a one to the Manchester Encoder/Decoder bit in the Mode Register (MR.MAN) enables
the Manchester Encoder/Decoder. When the Manchester Encoder/Decoder is used, characters
transmitted through the USART are encoded in Manchester II Biphase format. Depending on
polarity configuration, selected by the Transmission Manchester Polarity bit in the Manchester
Configuration Register (MAN.TX_MOPL), a logic level (zero or one) is transmitted as the transi-
tion from high -to-low or low-to-high during the middle of each bit period. This consumes twice
the bandwidth of the simpler NRZ coding schemes, but the receiver has more error control since
the expected input has a transition at every mid-bit period.
25.6.16.1
Manchester Encoder
An example of a Manchester encoded sequence is the byte 0xB1 (10110001) being encoded to
10 01 10 10 01 01 01 10, assuming default encoder polarity.
illustrates this coding
scheme.
Figure 25-44. NRZ to Manchester Encoding
A Manchester encoded character can be preceded by both a preamble sequence and a start
frame delimiter. The preamble sequence is a pre-defined pattern with a configurable length from
1 to 15 bit periods. If the preamble length is zero, the preamble waveform is not generated. The
preamble length is selected by writing to the Transmitter Preamble Length field (MAN.TX_PL).
The available preamble sequence patterns are:
• ALL_ONE
• ALL_ZERO
• ONE_ZERO
• ZERO_ONE
and are selected by writing to the Transmitter Preamble Pattern field (MAN.TX_PP).
illustrates the supported patterns.
NRZ
encoded
data
Manchester
encoded
data
1
0
1
1
0
0
0
1
Txd
Summary of Contents for AT32UC3A3128
Page 61: ...61 32072H AVR32 10 2012 AT32UC3A3 PLLEN PLL Enable 0 PLL is disabled 1 PLL is enabled...
Page 592: ...592 32072H AVR32 10 2012 AT32UC3A3 Manchester Configuration Register on page 614...
Page 989: ...989 32072H AVR32 10 2012 AT32UC3A3 37 2 Package Drawings Figure 37 1 TFBGA 144 package drawing...
Page 991: ...991 32072H AVR32 10 2012 AT32UC3A3 Figure 37 3 VFBGA 100 package drawing...
