AT04357 RCB256RFR2-XPRO User Guide [USER GUIDE]
TBDA-MCU-09/2013
14
Pin
number
Name
mega256RFR2
pin
Description
13
USART_RX
28-PD3-TXD1
Receiver line of Universal Synchronous and
Asynchronous serial Receiver and Transmitter
14
USART_TX
27-PD2-RXD1
Transmitter line of Universal Synchronous and
Asynchronous serial Receiver and Transmitter
15
SPI_SS_A
36-PB0
Slave select for SPI. Should be unique if possible.
16
SPI_MOSI
38-PB2
Master out slave in line of Serial peripheral interface.
Always implemented, bus type
17
SPI_MISO
39-PB3
Master in slave out line of Serial peripheral interface.
Always implemented, bus type
18
SPI_SCK
37-PB1
Clock for Serial peripheral interface. Always
implemented, bus type
19
GND
Ground
20
VCC
Power for extension board
4.2.2
J1 & J3
J1 and J3 provide access to all ZigBit pin's not routed to the J100 Xplained PRO interface
Table 4-2. J1
Pin
256RFR2 pin
J1-1
PE2/XCK0/AIN0
J1-2
PE3/OC3A/AIN1
J1-3
PD2/RXD1/INT2
J1-4
PD3/TXD1/INT3
J1-5
PD5/XCK1
J1-6
PD4/ICP1
J1-7
PD6/T1
J1-8
PG2/AMR
J1-9
PB4/OC2A/PCINT4
J1-10
PB6/OC1B/PCINT6
Table 4-3. J3
pin
256RFR2 pin
J3-1
PF0/ADC0
J3-2
PF1/ADC1
J3-3
PF2/ADC2/DIG2
J3-4
PF3/ADC3/DIG4
J3-5
AREF
J3-6
PE1/TXD0
J3-7
PE0/RXD0/PCINT8
J3-8
PB7/OC0A/OC1C/PCINT7
J3-9
PG5/OC0B
J3-10
PE7/ICP3/INT7/CLKO
4.2.3
JTAG (J2)
J2 is the JTAG programming header typically used by the JTAGICE.
