ATL TELECOM USER GUIDE
AM2048A OS/OM
63
There is an inherent limitation with X.21 and V.35 standards when timing information is only
transmitted in one direction.
The timing is usually sent from the DCE to the DTE. Data originating from the DCE and
travelling to the DTE arrives at the DTE with the same clock skew with which it originated at
the DCE. However, data originating at the DTE arrives back at the DCE skewed relative to the
DCE clock. This skew is equal to (2 x cable delay) + Driver delays at both ends.
Receive data is normally sampled at the half bit period position. So when the total clock skew
approaches half a bit period the DCE will be sampling the incoming data at the transition
between bits, this will cause the link to error.
When in DCE mode the AM2048 provides two extra clocking options to work around this
problem. These options are accessed from the “Configuration>User Port” screen.
INVERT RECEIVE CLOCK – Causes the AM2048 to sample the incoming data on the rising
edge of the TX clock instead of the falling edge. See Figure A1 for more information. This is
available for both V35, and X21.
DTE CLOCK ENABLE – Causes the AM2048 to use the clock returned from the DTE to sample
receive data instead of the TX clock. See Figure A2 for more information. This is available for
V35 (return clock on cct. 113), and X21 when in X mode (return clock on S Ext).
For this option to work the DTE must be providing a return clock.
In X21 mode this option cannot be used at the same time as byte timing.
A P P E N D I X A - X . 2 1 / V . 3 5 C L O C K O P T I O N S
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ATL TELECOM USER GUIDE
AM2048A OS/OM
