
Chapter 3
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AMI BIOS Setup
70
Pico
-IT
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ar
d
PIC
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U4
Options Summary
Data Bits
7
8
Optimal Default, Failsafe Default
Parity
None
Optimal Default, Failsafe Default
Even
Odd
Mark
Space
A parity bit can be sent with the data bits to detect some transmission errors.
Even: parity bit is 0 if the num of 1's in the data bits is even.
Odd: parity bit is 0 if num of 1's in the data bits is odd.
Mark: parity bit is always 1.
Space: Parity bit is always 0.
Mark and Space Parity do not allow for error detection. They can be used as
an additional data bit.
Stop Bits
1
Optimal Default, Failsafe Default
2
Stop bits indicate the end of a serial data packet. (A start bit indicates the
beginning). The standard setting is 1 stop bit. Communication with slow
devices may require more than 1 stop bit.
Flow Control
None
Optimal Default, Failsafe Default
Hardware
RTS/CTS
Flow control can prevent data loss from buffer overflow. When sending data, if
the receiving buffers are full, a 'stop' signal can be sent to stop the data flow.
Once the buffers are empty, a 'start' signal can be sent to re-start the flow.
Hardware flow control uses two wires to send start/stop signals.
VT-UTF8 Combo Key
Support
Disabled
Enabled
Optimal Default, Failsafe Default
Enable VT-UTF8 Combination Key Support for ANSI/VT100 terminals
Recorder Mode
Disabled
Optimal Default, Failsafe Default
Enabled
With this mode enabled only text will be sent. This is to capture Terminal data.
Resolution 100x31
Disabled
Optimal Default, Failsafe Default
Enabled
Enables or disables extended terminal resolution
Table Continues on
Next Page…
Summary of Contents for AAEON PICO-TGU4
Page 14: ...Preface XIV Pico ITX Board PICO TGU4 This page left intentionally blank ...
Page 15: ...Pico ITX Board PICO TGU4 Chapter 1 Chapter 1 Product Specifications ...
Page 18: ...Pico ITX Board PICO TGU4 Chapter 2 Chapter 2 Hardware Information ...
Page 19: ...Chapter 2 Hardware Information 5 Pico ITX Board PICO TGU4 2 1 Dimensions ...
Page 20: ...Chapter 2 Hardware Information 6 Pico ITX Board PICO TGU4 2 2 Jumpers and Connectors ...
Page 41: ...Chapter 2 Hardware Information 27 Pico ITX Board PICO TGU4 2 5 Function Block ...
Page 44: ...Pico ITX Board PICO TGU41 Chapter 3 Chapter 3 AMI BIOS Setup ...
Page 47: ...Chapter 3 AMI BIOS Setup 33 Pico ITX Board PICO TGU4 3 3 Setup Submenu Main ...
Page 48: ...Chapter 3 AMI BIOS Setup 34 Pico ITX Board PICO TGU4 3 4 Setup Submenu Advanced ...
Page 50: ...Chapter 3 AMI BIOS Setup 36 Pico ITX Board PICO TGU4 3 4 2 Memory Configuration ...
Page 54: ...Chapter 3 AMI BIOS Setup 40 Pico ITX Board PICO TGU4 3 4 4 PCH FW Configuration ...
Page 56: ...Chapter 3 AMI BIOS Setup 42 Pico ITX Board PICO TGU4 3 4 5 NVMe Configuration ...
Page 74: ...Chapter 3 AMI BIOS Setup 60 Pico ITX Board PICO TGU4 3 5 Setup Submenu System I O ...
Page 94: ...Chapter 3 AMI BIOS Setup 80 Pico ITX Board PICO TGU4 3 7 1 BBS Priorities ...
Page 95: ...Chapter 3 AMI BIOS Setup 81 Pico ITX Board PICO TGU4 3 8 Setup Submenu Save Exit ...
Page 96: ...Pico ITX Board PICO TGU4 Chapter 4 Chapter 4 Drivers Installation ...
Page 99: ...Pico ITX Board PICO TGU4 Appendix A Appendix A Mating Connectors ...
Page 101: ...Pico ITX Board PICO TGU4 Appendix B Appendix B I O Information ...
Page 102: ...Appendix B I O Information 88 Pico ITX Board PICO TGU4 B 1 I O Address Map ...
Page 103: ...Appendix B I O Information 89 Pico ITX Board PICO TGU4 B 2 Memory Address Map ...
Page 104: ...Appendix B I O Information 90 Pico ITX Board PICO TGU4 B 3 IRQ Mapping Chart ...
Page 105: ...Appendix B I O Information 91 Pico ITX Board PICO TGU4 ...
Page 106: ...Pico ITX Board PICO TGU4 Appendix C Appendix C Watchdog Timer Programming ...