Asus AAEON PICO-APL1 User Manual Download Page 61

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Chapter 3

–

AMI BIOS Setup

Pico
-IT

X Bo

PIC
O

-A

PL1

Options Summary

Platform Hierarchy

Disabled

Enabled

Optimal Default, Failsafe Default

Enable or disable Platform Hierarchy
Storage Hierarchy

Disabled

Enabled

Optimal Default, Failsafe Default

Enable or Disable Storage Hierarchy
Endorsement
Hierarchy

Disabled

Enabled

Optimal Default, Failsafe Default

Enable or Disable Endorsement Hierarchy
TPM2.0 UEFI Spec
Version

TCG_1_2

TCG_2

Optimal Default, Failsafe Default

Select the TCG2 Spec Version Support,
TCG_1_2: The compatible mode for Win8/Win10
TCG_2: Support new TCG2 protocol and event format for Win10 or later
Physical Presence Spec
Version

1.2

1.3

Optimal Default, Failsafe Default

Select to Tell O.S. to support PPI Spec Version 1.2 or 1.3. Note some HCK tests
might not support 1.3.

Summary of Contents for AAEON PICO-APL1

Page 1: ...Last Updated December 2 2020 PICO APL1 PICO ITX Board User s Manual 9th Ed ...

Page 2: ...n this manual is intended to be accurate and reliable However the original manufacturer assumes no responsibility for its use or for any infringements upon the rights of third parties that may result from its use The material in this document is for product information only and is subject to change without notice While reasonable efforts have been made in the preparation of this document to assure...

Page 3: ...re trademarks of International Business Machines Corporation Intel Celeron and Pentium are registered trademarks of Intel Corporation Intel Atom is a registered trademark of Intel Corporation Intel Movidius and Movidius Myriad 2 are registered trademarks of Intel Corporation All other product names or trademarks are properties of their respective owners Ownership is not implied nor claimed by the ...

Page 4: ...fore setting up your product please make sure the following items have been shipped Item Quantity PICO APL1 1 COM Line out Cable optional 1 If any of these items are missing or damaged please contact your distributor or sales representative immediately ...

Page 5: ...escriptions and explanations on the product s hardware and software features if any its specifications dimensions jumper connector settings definitions and driver installation instructions if any to facilitate users in setting up their product Users may refer to the product page at AAEON com for the latest version of this document ...

Page 6: ...nsient over voltage 7 Always disconnect this device from any AC supply before cleaning 8 While cleaning use a damp cloth instead of liquid or spray detergents 9 Make sure the device is installed near a power outlet and is easily accessible 10 Keep this device away from humidity 11 Place the device on a solid surface during installation to prevent falls 12 Do not cover the openings on the device to...

Page 7: ...intrusion to the device iii Exposure to moisture iv Device is not working as expected or in a manner as described in this manual v The device is dropped or damaged vi Any obvious signs of damage displayed on the device 18 DO NOT LEAVE THIS DEVICE IN AN UNCONTROLLED ENVIRONMENT WHERE THE STORAGE TEMPERATURE IS BELOW 20 C 4 F OR ABOVE 60 C 140 F TO PREVENT DAMAGE ...

Page 8: ...sion if the battery is incorrectly replaced Replace only with the same or equivalent type recommended by the manufacturer Dispose of used batteries according to the manufacturer s instructions and your local government s recycling or disposal directives Attention Il y a un risque d explosion si la batterie est remplacée de façon incorrecte Ne la remplacer qu avec le même modèle ou équivalent recom...

Page 9: ...素名称及含量 AAEON Main Board Daughter Board Backplane 部件名称有毒有害物质或元素铅 Pb 汞 Hg 镉 Cd 六价铬 Cr VI 多溴联苯 PBB 多溴二苯醚 PBDE 印刷电路板及其电子组件外部信号连接器及线材 O 表示该有毒有害物质在该部件所有均质材料中的含量均在 SJ T 11363 2006 标准规定的限量要求以下 X 表示该有毒有害物质至少在该部件的某一均质材料中的含量超出 SJ T 11363 2006 标准规定的限量要求备注此产品所标示之环保使用期限系指在一般正常使用状况下 ...

Page 10: ...yl Ethers PBDE PCB Other Components O O O O O Wires Connectors for External Connections O O O O O O O The quantity of poisonous or hazardous substances or elements found in each of the component s parts is below the SJ T 11363 2006 stipulated requirement X The quantity of poisonous or hazardous substances or elements found in at least one of the component s parts is beyond the SJ T 11363 2006 stip...

Page 11: ... Inverter Voltage Selection JP2 2 4 6 12 2 3 5 LVDS Port Backlight Lightness Control Mode JP3 13 2 4 List of Connectors 14 2 4 1 Digital IO Port CN1 15 2 4 2 LVDS Port Inverter Backlight Connector CN2 15 2 4 3 Front Panel CN3 16 2 4 4 Mini Card Slot Half Mini Card CN4 16 2 4 5 Mini Card Slot Full Mini Card mSATA by BOM CN6 19 2 4 6 BIO connector CN7 21 2 4 7 SATA Port CN8 23 2 4 8 Battery CN9 23 2...

Page 12: ...MI BIOS Setup 35 3 1 System Test and Initialization 36 3 2 AMI BIOS Setup 37 3 3 Main 38 3 4 Advanced 39 3 4 1 CPU Configuration 40 3 4 2 SATA Configuration 42 3 4 3 Hardware Monitor 43 3 4 4 SIO Configuration 44 3 4 4 1 Serial Port Configuration 45 3 4 5 DIO Configuration 46 3 4 6 Trusted Computing 47 3 4 7 Power Management 49 3 5 Chipset 50 3 5 1 North Bridge 51 3 5 1 1 LVDS Panel Configuration ...

Page 13: ...ap 67 A 3 IRQ Mapping Chart 68 Appendix B Mating Connectors 69 B 1 List of Mating Connectors and Cables 70 Appendix C PICO APL1 SEMI Quick Installation Guide 72 C 1 Packing List 73 C 2 Assembly procedure 75 Appendix D PICO APL1 AI Core Kit Installation Guide 81 D 1 Product Brief 82 D 2 Update Ubuntu and Kernel 83 D 3 Install NCSDK 86 D 4 Download Movidius Ncappzoo 89 D 5 Example in Movidius Ncappz...

Page 14: ...Pico ITX Board PICO APL1 Chapter 1 Chapter 1 Product Specifications ...

Page 15: ... series Intel Pentium N4200 Intel Celeron N3350 Processor SoC Memory Type 204 pin DDR3L SODIMM x 1 DDR3L 1867MHz Max Memory Capacity 8GB BIOS AMI SPI Wake On LAN Yes Watchdog Timer 255 Levels Power Requirement 12V AT ATX default Power Supply Type AT ATX default Power Consumption Typical Intel N3350 Processor DDR3L 8GB 0 91A 12V System Cooling Heat spreader heatsink optional Dimension 3 94 x 2 84 1...

Page 16: ...t Intel Atom E3900 series Intel Pentium N4200 Intel Celeron N3350 Processor SoC Resolution LVDS 18 24bit 2CH 1920 x 1200 optional HDMI 1 4b up to 3840 x 2160 DDI BIO LCD Interface 18 24bit 2CH LVDS I O Storage SSD SATA 6 0 Gb s x 1 mSATA or Mini PCIe by BOM Full size x 1 Ethernet Intel Gigabit Ethernet i210AT 10 100 1000Base TX RJ 45 x 1 USB Port USB 3 0 x 2 Rear IO USB 2 0 x 1 Serial Port COM1 RS...

Page 17: ...Chapter 1 Product Specifications 4 Pico ITX Board PICO APL1 I O DIO 4 bit 2 in 2 out Expansion Slot Mini Card Half size x 1 BIO optional x 1 I2C or SMBus x 1 SIM TPM Touch ...

Page 18: ...Pico ITX Board PICO APL1 Chapter 2 Chapter 2 Hardware Information ...

Page 19: ...re Information 6 Pico ITX Board PICO APL1 2 1 Dimensions Component Side MATER SPEC SCALE UNIT M FINISH 0 Ó 0 1 10 Ó 0 2 50 Ó 0 3 200 Ó 0 5 500 Ó 0 8 Ó 0 5 X ANGLE TOL 1 A 2 3 4 5 6 7 8 9 10 11 B C D E F Component Side ...

Page 20: ...TERIAL SPEC SCALE UNIT MM FINISH APPROVED 0 Ó 0 1 10 Ó 0 2 50 Ó 0 3 200 Ó 0 5 500 Ó 0 8 Ó 0 5 X ANGLE TOL CHECKED DESIGNED DWG No ITEM DATE REMARK SHEET MODEL No PART No 1 A3 E F G H I J 2 3 NA t 1 6mm PCB 1 1 A0 3 PICO APL1 PCB drawing Kevin Willie 1907APL102 1907APL102 Solder Side ...

Page 21: ...Chapter 2 Hardware Information 8 Pico ITX Board PICO APL1 Rear I O Configuration ...

Page 22: ...ormation 9 Pico ITX Board PICO APL1 2 2 Jumpers and Connectors Component Side MATERI SPEC SCALE UNIT M FINISH 0 Ó 0 1 10 Ó 0 2 50 Ó 0 3 200 Ó 0 5 500 Ó 0 8 Ó 0 5 X ANGLE TOL 1 A 2 3 4 5 6 7 8 9 10 11 B C D E F Component Side ...

Page 23: ...ATERIAL SPEC SCALE UNIT MM FINISH APPROVED 0 Ó 0 1 10 Ó 0 2 50 Ó 0 3 200 Ó 0 5 500 Ó 0 8 Ó 0 5 X ANGLE TOL CHECKED DESIGNED DWG No ITEM DATE REMARK SHEET MODEL No PART No 1 A3 F G H I J 2 3 NA t 1 6mm PCB 1 1 A0 3 PICO APL1 PCB drawing Kevin Willie 1907APL102 1907APL102 Solder Side ...

Page 24: ... the board s jumpers that you can configure for your application Label Function JP1 1 3 5 Clear CMOS Jumper JP1 2 4 6 Auto Power Button Enable Disable Selection JP2 1 3 5 LVDS Port Operating Voltage Selection JP2 2 4 6 LVDS Port Backlight Inverter Voltage Selection JP3 LVDS Port Backlight Lightness Control Mode Selection ...

Page 25: ...OS Jumper JP1 1 3 5 Normal Default Clear CMOS 2 3 2 Auto Power Button Enable Disable Selection JP1 2 4 6 Enable Default Disable 2 3 3 LVDS Port Operating Voltage Selection JP2 1 3 5 5V 3 3V Default 2 3 4 LVDS Port Backlight Inverter Voltage Selection JP2 2 4 6 12V 5V Default ...

Page 26: ...Chapter 2 Hardware Information 13 Pico ITX Board PICO APL1 2 3 5 LVDS Port Backlight Lightness Control Mode JP3 VR Mode Default PWM Mode ...

Page 27: ...CN2 LVDS Port Inverter Backlight Connector CN3 Front Panel CN4 Mini Card Slot Half Mini Card CN5 SPI Programming Header CN6 Mini Card Slot Full Mini Card mSATA By BOM CN7 BIO connector CN8 SATA Port CN9 Battery CN10 LAN RJ 45 Port CN11 USB 3 0 Port 1 2 CN12 5V Output for SATA HDD CN13 HDMI port CN14 External 12V Input CN15 DDR3L SO DIMM Slot CN16 LVDS Port CN17 COM Port 1 2 line out connector CN18...

Page 28: ...2 DIO0 I O 5V 3 DIO1 I O 5V 4 DIO2 I O 5V 5 DIO3 I O 5V 6 GND GND 2 4 2 LVDS Port Inverter Backlight Connector CN2 Pin Pin Name Signal Type Signal level 1 BKL_PWR PWR 5V 12V 2 BKL_CONTROL OUT 3 GND GND 4 GND GND 5 BKL_ENABLE OUT 3 3V Note1 LVDS BKL_PWR can be set to 5V or 12V by JP2 BLK_PWR 2 3 4 5 1 BKL_CONTROL GND GND BKL_ENABLE ...

Page 29: ... 2A 2 4 3 Front Panel CN3 Pin Pin Name Pin Pin Name 1 PWR_BTN 2 PWR_BTN 3 HDD_LED 4 HDD_LED 5 SPEAKER 6 SPEAKER 7 PWR_LED 8 PWR_LED 9 H W RESET 10 H W RESET 2 4 4 Mini Card Slot Half Mini Card CN4 Pin Pin Name Signal Type Signal Level 1 PCIE_WAKE IN 2 3 3VSB PWR 3 3V 3 NC 4 GND GND 5 NC 6 1 5V PWR 1 5V 7 PCIE_CLK_REQ IN 1 2 3 4 5 6 7 8 9 10 ...

Page 30: ...11 PCIE_REF_CLK DIFF 12 NC IN 13 PCIE_REF_CLK DIFF 14 NC 15 GND GND 16 NC PWR 17 NC 18 GND GND 19 NC 20 W_DISABLE OUT 3 3V 21 GND GND 22 PCIE_RST OUT 3 3V 23 PCIE_RX DIFF 24 3 3VSB PWR 3 3V 25 PCIE_RX DIFF 26 GND GND 27 GND GND 28 1 5V PWR 1 5V 29 GND GND 30 SMB_CLK I O 3 3V 31 PCIE_TX DIFF 32 SMB_DATA I O 3 3V 33 PCIE_TX DIFF ...

Page 31: ...O APL1 Pin Pin Name Signal Type Signal Level 34 GND GND 35 GND GND 36 USB_D DIFF 37 GND GND 38 USB_D DIFF 39 3 3VSB PWR 3 3V 40 GND GND 41 3 3VSB PWR 3 3V 42 NC 43 GND GND 44 NC 45 NC 46 NC 47 NC 48 1 5V PWR 1 5V 49 NC 50 GND GND 51 NC 52 3 3VSB PWR 3 3V ...

Page 32: ...1 PCIE_WAKE IN 2 3 3VSB 3 3V PWR 3 3V 3 NC 4 GND GND 5 NC 6 1 5V PWR 1 5V 7 PCIE_CLK_REQ IN 8 UIM_PWR PWR 9 GND GND 10 UIM_DATA I O 11 PCIE_REF_CLK DIFF 12 UIM_CLK IN 13 PCIE_REF_CLK DIFF 14 UIM_RST IN 15 GND GND 16 UIM_VPP PWR 17 NC 18 GND GND 19 NC 20 W_DISABLE OUT 3 3V 21 GND GND 22 PCIE_RST OUT 3 3V 23 PCIE_RX mSATARX DIFF 24 3 3VSB 3 3V PWR 3 3V ...

Page 33: ...D GND 27 GND GND 28 1 5V PWR 1 5V 29 GND GND 30 SMB_CLK I O 3 3V 31 PCIE_TX mSATATX DIFF 32 SMB_DATA I O 3 3V 33 PCIE_TX mSATATX DIFF 34 GND GND 35 GND GND 36 USB_D DIFF 37 GND GND 38 USB_D DIFF 39 3 3VSB 3 3V PWR 3 3V 40 GND GND 41 3 3VSB 3 3V PWR 3 3V 42 NC 43 GND GND 44 NC 45 NC 46 NC 47 NC 48 1 5V PWR 1 5V 49 NC 50 GND GND ...

Page 34: ..._TXN0 5 PCIE_RXN0 6 PCIE_TXP0 7 PCIE_RXP0 8 GND 9 GND 10 PCIE_TXN4 11 PCIE_RXN4 12 PCIE_TXP4 13 PCIE_RXP4 14 GND 15 GND 16 PS_ON 17 DDI0_DDCCLK_3P3 18 DDI0_DDCDATA_3P3 19 5VSB 20 5VSB 21 5VSB 22 5VSB 23 PCIE_REF_CLK0 24 RESET 25 PCIE_REF_CLK0 26 GND 27 GND 28 DDI0_TXN1 29 DDI0_TXN0 30 DDI0_TXP1 31 DDI0_TXP0 32 GND 33 GND 34 DDI0_TXN3 35 DDI0_TXN2 36 DDI0_TXP3 37 DDI0_TXP2 38 GND 39 GND 40 BIO_DDI0...

Page 35: ...SB3_TX2_P 47 USBN4 48 GND 49 USBP4 50 USB3_RX2_N 51 GND 52 USB3_RX2_P 53 SMB_CLK 54 GND 55 SMB_DATA 56 WAKE 57 GND 58 USB_OC0 59 5V 60 USB_OC1 61 5V 62 5V 63 5V 64 5V 65 LPC_AD0 66 LPC_FRAME 67 LPC_AD1 68 SERIRQ 69 LPC_AD2 70 LPC_DRQ 71 LPC_AD3 72 GPIO0 BIO POWEROK 73 GND 74 AGND 75 LPC_CLK 76 AUD_LINEOUT_L 77 PME 78 AUD_LINEOUT_R 79 GND 80 GND ...

Page 36: ...CO APL1 2 4 7 SATA Port CN8 Pin Pin Name Signal Type Signal Level 1 GND GND 2 SATA_TX1 DIFF 3 SATA_TX1 DIFF 4 GND GND 5 SATA_RX1 DIFF 6 SATA_RX1 DIFF 7 GND GND 2 4 8 Battery CN9 Pin Pin Name Signal Type Signal Level 1 3 3V PWR 3 3V 2 GND GND Pin 1 Pin 7 ...

Page 37: ...gnal Type Signal Level 1 MDI0 DIFF 2 MDI0 DIFF 3 MDI1 DIFF 4 MDI2 DIFF 5 MDI2 DIFF 6 MDI1 DIFF 7 MDI3 DIFF 8 MDI3 DIFF 2 4 10 USB3 0 Ports 0 and 1 CN11 Pin Pin Name Signal Type Signal Level 1 5VSB PWR 5V 2 USB0_D DIFF 3 USB0_D DIFF 4 GND GND 5 USB0_SSRX DIFF 6 USB0_SSRX DIFF 1 ACT LINK LED SPEED LED 8 ...

Page 38: ... Level 7 GND GND 8 USB0_SSTX DIFF 9 USB0_SSTX DIFF 10 5VSB PWR 5V 11 USB1_D DIFF 12 USB1_D DIFF 13 GND GND 14 USB1_SSRX DIFF 15 USB1_SSRX DIFF 16 GND GND 17 USB1_SSTX DIFF 18 USB1_SSTX DIFF 2 4 11 5V Output for SATA HDD CN12 Pin Pin Name Signal Type Signal Level 1 5V PWR 5V 2 GND GND 5V GND ...

Page 39: ...nal Type Signal level 1 TMDS_DAT2 DIFF 2 GND GND 3 TMDS_DAT2 DIFF 4 TMDS_DAT1 DIFF 5 GND GND 6 TMDS_DAT1 DIFF 7 TMDS_DAT0 DIFF 8 GND GND 9 TMDS_DAT0 DIFF 10 TMDS_CLK DIFF 11 GND GND 12 TMDS_CLK DIFF 13 NC 14 NC 15 DDC_CLK I O 5V 16 DDC_DATA I O 5V 17 GND GND 18 5V I O 5V 19 HPLG_DETECT IN 1 2 18 19 ...

Page 40: ...D GND 2 4 14 DDR3L SO DIMM Slot CN15 Standard specification 2 4 15 LVDS Port CN16 Note1 LVDS LCD_PWR can be set to 3 3V or 5V by JP2 Note2 The max driving current is 2A Pin Pin Name Signal Type Signal Level 1 BKL_ENABLE OUT 2 BKL_CONTROL OUT 3 LCD_PWR PWR 3 3V 5V 4 GND GND 5 LVDS_A_CLK DIFF 6 LVDS_A_CLK DIFF 7 LCD_PWR PWR 3 3V 5V 8 GND GND 12V GND ...

Page 41: ...A1 DIFF 12 LVDS_DA1 DIFF 13 LVDS_DA2 DIFF 14 LVDS_DA2 DIFF 15 LVDS_DA3 DIFF 16 LVDS_DA3 DIFF 17 DDC_DATA I O 3 3V 18 DDC_CLK I O 3 3V 19 LVDS_DB0 DIFF 20 LVDS_DB0 DIFF 21 LVDS_DB1 DIFF 22 LVDS_DB1 DIFF 23 LVDS_DB2 DIFF 24 LVDS_DB2 DIFF 25 LVDS_DB3 DIFF 26 LVDS_DB3 DIFF 27 LCD_PWR PWR 3 3V 5V 28 GND GND 29 LVDS_B_CLK DIFF 30 LVDS_B_CLK DIFF ...

Page 42: ...r CN17 Pin Pin Name Signal Type Signal Level 1 DCDB IN 2 DSRB IN 3 RXB IN 4 RTSB OUT 9V 5 TXB OUT 9V 6 CTSB IN 7 DTRB OUT 9V 8 RIB 5V 12V IN PWR 5V 12V 9 DCDA IN 10 DSRA IN 11 RXA IN 12 RTSA OUT 9V 13 TXA OUT 9V 14 CTSA IN 15 DTRA OUT 9V 16 RIA IN 17 GND GND 18 AGND GND 19 LOUT_R I O 20 LOUT_L I O ...

Page 43: ...5 NC 6 NC 7 NC 8 NC 5V 12V PWR 5V 12V 17 GND GND 2 4 18 COM Port2 RS 422 Pin Pin Name Signal Type Signal Level 1 RS422_TX OUT 5V 2 NC 3 RS422_TX OUT 5V 4 NC 5 RS422_RX IN 6 NC 7 RS422_RX IN 8 NC 5V 12V PWR 5V 12V 17 GND GND Note1 COM2 RS 232 422 485 can be set by BIOS setting Default is RS 232 Note2 COM2 RI 5V 12V function can be set by BOM R248 RI R256 12V R250 5V ...

Page 44: ...in Pin Name Signal Type Signal Level 1 LAD0 I O 3 3V 2 LAD1 I O 3 3V 3 LAD2 I O 3 3V 4 LAD3 I O 3 3V 5 3 3V PWR 3 3V 6 LFRAME IN 7 LRESET OUT 3 3V 8 GND GND 9 LCLK OUT 10 SMB_DATA Default I2C_DATA I O 3 3V 11 SMB_CLK Default I2C_CLK OUT 3 3V 12 SMB_ALERT Default INT_SERIRQ I O 3 3V ...

Page 45: ...Chapter 2 Hardware Information 32 Pico ITX Board PICO APL1 2 4 20 USB 2 0 Port 1 CN19 Pin Pin Name Signal Type Signal Level 1 5VSB PWR 5V 2 USBD5 DIFF 3 USBD5 DIFF 4 GND GND 5 GND GND ...

Page 46: ...Inverter Backlight Connector CN2 VDD 5V 2A or 12V 2A Mini Card Slot CN4 3 3VSB 1 5V 3 3V 1 1A 1 5V 0 375A Mini Card Slot CN6 3 3VSB 1 5V 3 3V 1 1A 1 5V 0 375A USB 3 0 Port 1 2 CN10 5VSB 5VSB 1A per channel 5V Output for SATA HDD CN12 5V 5V 1A LVDS Port CN16 VCC 3 3V 2A or 5V 2A COM Port 2 CN17 5V 12V 5V 1A or 12V 1A LPC Port CN18 3 3V 3 3V 0 5A USB 2 0 Port 1 CN19 5VSB 5VSB 0 5A ...

Page 47: ...Chapter 2 Hardware Information 34 Pico ITX Board PICO APL1 2 6 Function Block ...

Page 48: ...Pico ITX Board PICO APL1 Chapter 3 Chapter 3 AMI BIOS Setup ...

Page 49: ...nst the values stored in the CMOS memory and BIOS NVRAM If a system configuration is not found or an error is detected the system will load the default configuration and reboot automatically There are four situations in which you will need to setup system configuration 1 You are starting your system for the first time 2 You have changed the hardware attached to your system 3 The system configurati...

Page 50: ...AM so that it retains the Setup information when the power is turned off Entering Setup Power on the computer and press Del or ESC immediately This will allow you to enter Setup Main Set the date use tab to switch between date elements Advanced Enable disable boot option for legacy network devices Chipset Host bridge parameters Security Set setup administrator password Boot Enables disable quiet b...

Page 51: ...MI BIOS Setup 38 Pico ITX Board PICO APL1 3 3 Main Options Summary System Date Day MM DD YYYY Change the month year and century The Day is changed automatically System Time HH MM SS Change the clock of the system ...

Page 52: ...nfiguration Hardware Monitor Display system hardware status CPU temperature etc SIO Configuration SIO Chip configuration Enable or Disable SIO Logical Devices Resources and Features settings etc DIO Configuration Set Input Output of Digital Port Configuration Trusted Computing Set Security Device Support Parameters Power Management System ACPI Power Mode Wake Event Configuration ...

Page 53: ... Optimal Default Failsafe Default Enable Disable Intel SpeedStep Turbo Mode Disabled Enabled Optimal Default Failsafe Default Turbo mode Intel Virtualization Technology Disabled Enabled Optimal Default Failsafe Default When enabled a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology VT d Disabled Optimal Default Failsafe Default Enabled Enable Disable CPU VT d ...

Page 54: ...Chapter 3 AMI BIOS Setup 41 Pico ITX Board PICO APL1 Options Summary Power Limit 1 Enable Disabled Optimal Default Failsafe Default Enabled Enable Disable Power Limit 1 ...

Page 55: ...ard PICO APL1 3 4 2 SATA Configuration Options Summary SATA GEN SPEED AUTO Optimal Default Failsafe Default GEN1 GEN2 GEN3 SATA GEN SPEED selection Port 0 mSATA port Disabled Optimal Default Failsafe Default Enabled Enable Disable SATA port ...

Page 56: ...Chapter 3 AMI BIOS Setup 43 Pico ITX Board PICO APL1 3 4 3 Hardware Monitor ...

Page 57: ...BIOS Setup 44 Pico ITX Board PICO APL1 3 4 4 SIO Configuration Options Summary Serial Port 1 2 Configuration View and Set Basic properties of the SIO Logical device Like IO Base IRQ Range DMA Channel and Device Mode ...

Page 58: ...ailsafe Default Enable or Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 2F8h IRQ 3 IO 3F8h IRQ 4 Allows user to change Device s Resource settings New settings will be reflected on This Setup Page after System restarts Mode RS232 Optimal Default Failsafe Default RS422 RS485 UART RS232 422 485 selection ...

Page 59: ...MI BIOS Setup 46 Pico ITX Board PICO APL1 3 4 5 DIO Configuration Options Summary DIO Output Input Set DIO as Input or Output Level High Optimal Default Failsafe Default Low Set output level when DIO pin is output ...

Page 60: ...TCG EFI protocol and INT1A interface will not be available SHA 1 PCR Bank Disable Enable Optimal Default Failsafe Default Enable or Disable SHA 1 PCR Bank SHA256 PCR Bank Disable Enable Optimal Default Failsafe Default Enable or Disable SHA256 PCR Bank Pending Operation None Optimal Default Failsafe Default TPM Clear Schedule an Operation for the Security Device NOTE Your Computer will reboot duri...

Page 61: ... Hierarchy Disabled Enabled Optimal Default Failsafe Default Enable or Disable Endorsement Hierarchy TPM2 0 UEFI Spec Version TCG_1_2 TCG_2 Optimal Default Failsafe Default Select the TCG2 Spec Version Support TCG_1_2 The compatible mode for Win8 Win10 TCG_2 Support new TCG2 protocol and event format for Win10 or later Physical Presence Spec Version 1 2 1 3 Optimal Default Failsafe Default Select ...

Page 62: ...Optimal Default Failsafe Default AT Type Select system power mode Restore AC Power Loss Last State Optimal Default Failsafe Default Always On Always Off Determine if the system turns on or off after AC resume from G3 to S5 state RTC wake system from S5 Disable Optimal Default Failsafe Default Fixed Time RTC wake ...

Page 63: ...Chapter 3 AMI BIOS Setup 50 Pico ITX Board PICO APL1 3 5 Chipset ...

Page 64: ...Chapter 3 AMI BIOS Setup 51 Pico ITX Board PICO APL1 3 5 1 North Bridge ...

Page 65: ...Disabled Enabled Optimal Default Failsafe Default Enable Disabled this panel LVDS Panel Type 640X480 60HZ 800X480 60HZ 800X600 60HZ 1024X600 60HZ 1024X768 60HZ Optimal Default Failsafe Default 1280X768 60HZ 1280X800 60HZ 1280X1024 60HZ 1366X768 60HZ 1440X900 60HZ 1600X1200 60HZ 1920X1080 60HZ 1920X1200 60HZ ...

Page 66: ...efault 24 bit 36 bit 48 bit Select panel depth Backlight Type Normal Optimal Default Failsafe Default Inverted Select backlight control signal type Backlight Level 0 10 20 30 40 50 60 70 80 Optimal Default Failsafe Default 90 100 Select backlight control level Backlight PWM Freq 100Hz 200Hz 220Hz Optimal Default Failsafe Default 500Hz 1 1KHz 2 2KHz 6 5KHz Select PWM frequency of backlight control ...

Page 67: ...ico ITX Board PICO APL1 3 5 2 South Bridge Options Summary HD Audio Support Disabled Enabled Optimal Default Failsafe Default Enable Disabled HD audio PCIe Speed Auto Optimal Default Failsafe Default Gen1 Gen2 Configure PCIe Speed ...

Page 68: ...er enters the Setup utility A User Password does not provide access to many of the features in the Setup utility Select the password you wish to set and press Enter In the dialog box enter your password must be between 3 and 20 letters or numbers Press Enter and retype your password to confirm Press Enter again to set the password Removing the Password Select the password you want to remove and en...

Page 69: ...is in User mode The mode change requires platform reset Secure Boot Mode Custom Optimal Default Failsafe Default Standard Secure Boot mode options Standard or Custom In Custom mode Secure Boot Policy variables can be configured by a physically present user without full authentication Restore Factory Keys Force System to User Mode Install factory default Secure Boot key databases Reset To Setup Mod...

Page 70: ...mode The mode change requires platform reset Restore Factory Keys Force System to User Mode Install factory default Secure Boot key databases Reset To Setup Mode Delete all Secure Boot key databases from NVRAM Export Secure Boot variables Copy NVRAM content of Secure Boot variables to files in a root folder on a file system device Enroll Efi Image Allow the image to run in Secure Boot mode Enroll ...

Page 71: ...lete Key Exchange Keys Details Export Update Append Delete Authorized Signatures Details Export Update Append Delete Forbidden Signatures Details Export Update Append Delete Authorized TimeStamps Update Append OsRecovery Signatures Update Append Enroll Factory Defaults or load certificates from a file 1 Public Key Certificate a EFI_SIGNATURE_LIST b EFI_CERT_X509 DER c EFI_CERT_RSA2048 bin d EFI_CE...

Page 72: ...fault EnableDisable showing boot logo Monitor Mwait Disable Enabled Auto Optimal Default Failsafe Default Enable Disable Monitor Mwait To install Linux OS please set this item to disable Ipv4 PXE Support Disabled Optimal Default Failsafe Default Enabled Enable Ipv4 PXE Boot Support If disabled IPV4 PXE boot option will not be created ...

Page 73: ...Chapter 3 AMI BIOS Setup 60 Pico ITX Board PICO APL1 3 7 1 BBS Priorities ...

Page 74: ...Chapter 3 AMI BIOS Setup 61 Pico ITX Board PICO APL1 3 8 Save Exit ...

Page 75: ...Pico ITX Board PICO APL1 Chapter 4 Chapter 4 Drivers Installation ...

Page 76: ... below to install them Step 1 Install Chipset Driver 1 Open the STEP1 CHIPSET folder and open the SetupChipset exe file 2 Follow the instructions 3 Drivers will be installed automatically Step 2 Install Graphic Driver 1 Open the STEP2 VGA folder and open the Setup exe file 2 Follow the instructions 3 Driver will be installed automatically Step 3 Install LAN Driver 1 Open the STEP3 LAN folder and s...

Page 77: ... Open the STEP5 TXE folder and open the SetupTXE exe file 2 Follow the instructions 3 Driver will be installed automatically Step 6 Install FintekSerial_Patch_T4R8 Driver 1 Open the STEP6 FintekSerial_Patch_T4R8 folder and open the Setup exe file 2 Follow the instructions 3 Driver will be installed automatically Step 7 Install GPIO Driver 1 Open the STEP7 GPIO folder and open the SetupSerialIO exe...

Page 78: ...Pico ITX Board PICO APL1 Appendix A Appendix A I O Information ...

Page 79: ...Appendix A I O Information 66 Pico ITX Board PICO APL1 A 1 I O Address Map ...

Page 80: ...Appendix A I O Information 67 Pico ITX Board PICO APL1 A 2 Memory Address Map ...

Page 81: ...Appendix A I O Information 68 Pico ITX Board PICO APL1 A 3 IRQ Mapping Chart ...

Page 82: ...Pico ITX Board PICO APL1 Appendix B Appendix B Mating Connectors ...

Page 83: ...110 1050 Front Panel Cable 1701100156 CN7 BIO connector Hirose FX18 80S 0 8SV20 N A N A CN8 SATA Port Molex 887505318 SATA Cable 1709070500 CN9 Battery Molex 51021 0200 Battery Cable 175011301C CN10 LAN Connector Molex 44915 0001 N A N A CN12 5V Output for SATA HDD JST PHR 2 SATA power cable 1702150155 CN14 External 12V Input Molex 19211 0003 Power cable 170204010R CN16 LVDS Port ACES 50247 030H0H...

Page 84: ...Appendix B Mating Connectors 71 Pico ITX Board PICO APL1 Connector Label Function Mating Connector Available Cable Cable P N Vendor Model no CN19 USB Connector Molex 51021 0500 USB Cable 1700050207 ...

Page 85: ...Pico ITX Board PICO APL1 Appendix C Appendix C PICO APL1 SEMI Quick Installation Guide ...

Page 86: ...ard PICO APL1 C 1 Packing List Before setting up your product please make sure the following items have been shipped Item Description Remark 1 PICO APL1 MB 2 Chassis Major parts 3 Bottom Cover of Chassis 4 Accessory kits w power button 5 QIG This Document A0 3 1 2 3 ...

Page 87: ...Appendix C PICO APL1 SEMI Quick Installation Guide 74 Pico ITX Board PICO APL1 4 ...

Page 88: ...nstallation Guide 75 Pico ITX Board PICO APL1 C 2 Assembly procedure Step 1 Assemble the MB a Insert memory into the socket at about 30 degrees Push it down gently until secured b Remove the nut and shim ring from the DC Jack on the MB ...

Page 89: ... PICO APL1 SEMI Quick Installation Guide 76 Pico ITX Board PICO APL1 c Gently insert the COM Port 1 2 line out connector cable It will click once in place Make sure to orient the connector as in the picture below ...

Page 90: ...llation Guide 77 Pico ITX Board PICO APL1 Step 2 Install MB into Chassis a Remove the protective liner from thermal pad b Set MB onto chassis being sure to line up the four holes with the posts Fasten the MB to the chassis with four screws ...

Page 91: ... Pico ITX Board PICO APL1 c Fasten 2 screws on the side of the chassis for COM Port d Thread the power button cable from outside to inside of the chassis Gently insert the button it will click when in place e Connect the power button cable to CN3 PIN1 2 3 ...

Page 92: ...bly a Fasten the nut and shim ring of DC Jack on MB be sure to put the shim ring on before the nut as shown below b Stick the battery to the board c Slide the bottom cover onto the main chassis d Fasten the bottom cover to main chassis with four flat black screws two on the bottom one on each side as shown ...

Page 93: ...Appendix C PICO APL1 SEMI Quick Installation Guide 80 Pico ITX Board PICO APL1 ...

Page 94: ...Pico ITX Board PICO APL1 Appendix D Appendix D PICO APL1 AI Core Kit Installation Guide ...

Page 95: ...s Myriad 2 VPU Before you start to set up the development environment we suggest you prepare the following items 1 Up to 2G DRAM 2 At least 4GB of free storage space connected to the CN8 or CN12 SATA connector for SATA 5V power 3 HDMI monitor 4 USB keyboard mouse 5 Ubuntu 16 04 6 An Internet connection Connect all the above peripherals then power on and open terminal command mode in Ubuntu ...

Page 96: ...Appendix D PICO APL1 AI Core Kit Installation Guide 83 Pico ITX Board PICO APL1 D 2 Update Ubuntu and Kernel Step 1 To open terminal select search Step 2 Type cmd or terminal ...

Page 97: ...Appendix D PICO APL1 AI Core Kit Installation Guide 84 Pico ITX Board PICO APL1 Step 3 Type sudo apt update and press enter Step 4 Type sudo apt full upgrade y ...

Page 98: ...Appendix D PICO APL1 AI Core Kit Installation Guide 85 Pico ITX Board PICO APL1 Step 5 After system finishes type sudo reboot and the system will restart Step 6 After the restart open terminal again ...

Page 99: ...x D PICO APL1 AI Core Kit Installation Guide 86 Pico ITX Board PICO APL1 D 3 Install NCSDK Please refer to https developer movidius com start Step 1 In terminal type mkdir p workspace Step 2 Type cd workspace ...

Page 100: ...Appendix D PICO APL1 AI Core Kit Installation Guide 87 Pico ITX Board PICO APL1 Step 3 Type sudo apt install git Step 4 Type git clone https github com movidius ncsdk git ...

Page 101: ...Appendix D PICO APL1 AI Core Kit Installation Guide 88 Pico ITX Board PICO APL1 Step 5 Type cd workspace ncsdk Step 6 Type make install Note If the installation fails run make install again ...

Page 102: ...Appendix D PICO APL1 AI Core Kit Installation Guide 89 Pico ITX Board PICO APL1 D 4 Download Movidius Ncappzoo Step 1 In terminal type cd workspace ...

Page 103: ...Appendix D PICO APL1 AI Core Kit Installation Guide 90 Pico ITX Board PICO APL1 Step 2 Type git clone https github com movidius ncappzoo Step 3 Type cd workspace ncappzo apps street_cam make opencv ...

Page 104: ...it Installation Guide 91 Pico ITX Board PICO APL1 After installing NCSDK Ncappzoo and OpenCV you can start running demos Step 1 Type cd workspace ncappzoo apps Step 2 Type ls I You will see the names of the folders in the directory ...

Page 105: ...ppendix D PICO APL1 AI Core Kit Installation Guide 92 Pico ITX Board PICO APL1 Step 3 Type cd folder name to open the folder you want Step 4 Type make help to view the commands you can use in each folder ...

Page 106: ...PICO APL1 AI Core Kit Installation Guide 93 Pico ITX Board PICO APL1 D 5 Example in Movidius Ncappzoo example cd workspace ncappzoo apps hello_ncs_cpp make run Step 1 Type cd workspace ncappzoo apps hello_ncs_cpp ...

Page 107: ...Appendix D PICO APL1 AI Core Kit Installation Guide 94 Pico ITX Board PICO APL1 Step 2 Type make help to view the commands you can use in the folder Step 3 Type make run ...

Page 108: ...erminal cd workspace ncappzo apps stree_cam make opencv Other Some demos might need two or more Movidius modules an Internet connection or a USB Camera Customers can purchase more USB type Movidius Neural Compute Sticks and plug them in to a USB port Helpful links for more information https developer movidius com start https github com movidius ncappzoo AAEON Accessories 968C064G52 64GB SATA DOM w...

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