Asus AAEON OMNI-2155-CML, User Manual

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Preface XIII
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CML
3.4.5 NVMe Configuration ............................................................................ 46
3.4.5.1 NVMe Configuration: Device ............................................... 47
3.4.6 USB Configuration ................................................................................ 48
3.4.7 Hardware Monitor ................................................................................ 49
3.4.8 SIO Configuration ................................................................................. 50
3.4.8.1 SIO Configuration: Serial Port 1 ............................................ 51
3.4.8.2 SIO Configuration: Serial Port 2 ........................................... 52
3.4.9 Power Management ............................................................................. 53
3.5 Setup Submenu: Chipset .................................................................................... 54
3.5.1 System Agent (SA) Configuration ..................................................... 55
3.5.1.1 LVDS Panel Configuration ..................................................... 57
3.5.2 PCH-IO Configuration ......................................................................... 58
3.6 Setup Submenu: Security ................................................................................... 60
3.6.1 Secure Boot ............................................................................................. 61
3.6.1.1 Key Management .................................................................... 62
3.7 Setup Submenu: Boot ......................................................................................... 64
3.8 Setup Submenu: Save & Exit ............................................................................. 65
Chapter 4 – Drivers Installation ........................................................................................... 66
4.1 Drivers Download and Installation.................................................................... 67
Appendix A - Watchdog Timer Programming................................................................... 69
A.1 Watchdog Timer Initial Program ....................................................................... 70
Appendix B - I/O Information .............................................................................................. 72
B.1 I/O Address Map .................................................................................................. 73
B.2 Memory Address Map ........................................................................................ 76
B.3 IRQ Mapping Chart ............................................................................................. 78