Asus Aaeon NanoCOM-APL User Manual Download Page 33

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Chapter 3 – AMI BIOS Setup

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3.4.2 Advanced: SATA Configuration

Options summary:

Chipset SATA

Enabled

Optimal Default, Failsafe Default

Disabled

Enable or Disable the Chipset SATA Controller. The Chipset SATA Controller support the

2 black internal SATA ports ( up to 3Gb/s supported per port ).

Port 0

Disabled

Enabled

Optimal Default, Failsafe Default

Enable or Disable SATA Port.

SATA Port 0 Hot

Plug Capability

Disabled

Optimal Default, Failsafe Default

Enabled

If enabled, SATA port will be reported as Hot Plug capable.

Summary of Contents for Aaeon NanoCOM-APL

Page 1: ...Last Updated February 26 2018 NanoCOM APL COM Express Module User s Manual 1st Ed ...

Page 2: ...d in this manual is intended to be accurate and reliable However the original manufacturer assumes no responsibility for its use or for any infringements upon the rights of third parties that may result from its use The material in this document is for product information only and is subject to change without notice While reasonable efforts have been made in the preparation of this document to ass...

Page 3: ... trademark of Microsoft Corp Intel Pentium Celeron and Xeon are registered trademarks of Intel Corporation Core Atom are trademarks of Intel Corporation ITE is a trademark of Integrated Technology Express Inc IBM PC AT PS 2 and VGA are trademarks of International Business Machines Corporation All other product names or trademarks are properties of their respective owners ...

Page 4: ...ing up your product please make sure the following items have been shipped Item Quantity NanoCOM APL 1 Product DVD with User s Manual in pdf and drivers 1 If any of these items are missing or damaged please contact your distributor or sales representative immediately ...

Page 5: ... detailed descriptions and explanations on the product s hardware and software features if any its specifications dimensions jumper connector settings definitions and driver installation instructions if any to facilitate users in setting up their product Users may refer to the AAEON com for the latest version of this document ...

Page 6: ...transient over voltage 7 Always disconnect this device from any AC supply before cleaning 8 While cleaning use a damp cloth instead of liquid or spray detergents 9 Make sure the device is installed near a power outlet and is easily accessible 10 Keep this device away from humidity 11 Place the device on a solid surface during installation to prevent falls 12 Do not cover the openings on the device...

Page 7: ...usion to the device iii Exposure to moisture iv Device is not working as expected or in a manner as described in this manual v The device is dropped or damaged vi Any obvious signs of damage displayed on the device 18 DO NOT LEAVE THIS DEVICE IN AN UNCONTROLLED ENVIRONMENT WITH TEMPERATURES BEYOND THE DEVICE S PERMITTED STORAGE TEMPERATURES SEE CHAPTER 1 TO PREVENT DAMAGE ...

Page 8: ...plosion if the battery is incorrectly replaced Replace only with the same or equivalent type recommended by the manufacturer Dispose of used batteries according to the manufacturer s instructions and your local government s recycling or disposal directives Attention Il y a un risque d explosion si la batterie est remplacée de façon incorrecte Ne la remplacer qu avec le même modèle ou équivalent re...

Page 9: ...质或元素名称及含量 AAEON Main Board Daughter Board Backplane 部件名称有毒有害物质或元素铅 Pb 汞 Hg 镉 Cd 六价铬 Cr VI 多溴联苯 PBB 多溴二苯醚 PBDE 印刷电路板及其电子组件外部信号连接器及线材 O 表示该有毒有害物质在该部件所有均质材料中的含量均在 SJ T 11363 2006 标准规定的限量要求以下 X 表示该有毒有害物质至少在该部件的某一均质材料中的含量超出 SJ T 11363 2006 标准规定的限量要求备注此产品所标示之环保使用期限系指在一般正常使用状况下 ...

Page 10: ...henyl Ethers PBDE PCB Other Components X O O O O Wires Connectors for External Connections X O O O O O O The quantity of poisonous or hazardous substances or elements found in each of the component s parts is below the SJ T 11363 2006 stipulated requirement X The quantity of poisonous or hazardous substances or elements found in at least one of the component s parts is beyond the SJ T 11363 2006 s...

Page 11: ...nu Advanced 18 3 4 1 Advanced CPU Configuration 19 3 4 2 Advanced SATA Configuration 21 3 4 3 Advanced Camera Configuration 22 3 4 4 Advanced On Module Hardware Monitor 23 3 4 4 1 Fan 1 Mode Configuration Full Mode 24 3 4 4 2 Fan Mode Configuration Manual Mode by PWM 25 3 4 4 3 Fan Mode Configuration Auto Mode by PWM 26 3 4 5 Advanced On Module FEATURES 28 3 4 6 Advanced SIO Configuration 29 3 4 6...

Page 12: ...ity 42 3 7 Setup submenu Boot 43 3 8 Setup submenu Save Exit 45 Chapter 4 Drivers Installation 46 4 1 Product CD DVD 47 Appendix A Watchdog Timer Programming 49 A 1 Watchdog Timer Initial Program 50 Appendix B I O Information 55 B 1 I O Address Map 56 B 2 Memory Address Map 57 B 3 IRQ Mapping Chart 58 Appendix C Programming Digital I O 59 C 1 DI O Programming 60 C 2 Digital I O Register 61 C 3 Dig...

Page 13: ...COM Express Module NanoCOM APL Chapter 1 Chapter 1 Product Specifications ...

Page 14: ...ry Type Onboard LPDDR4 Max Memory Capacity 8GB LPDDR4 Onboard BIOS AMI BIOS Legacy free Wake On LAN Yes Watchdog Timer 255 Levels Power Requirement Standard 12V AT ATX Optional 5V AT ATX Power Supply Type AT ATX Power Consumption Typical Up to use E3950 TDP 12W CPU Dimension L x W 3 31 x 2 17 84mm x 55mm Operating Temperature 32 F 140 F 0 C 60 C Storage Temperature 40 F 176 F 40 C 80 C Operating H...

Page 15: ...o Output LVDS LCD eDP DDI x 1 LVDS Interface Supports 18bit and 24bit Single channel I O Ethernet Intel I210IT Audio High Definition Audio Interface USB Support USB 2 0 x 8 USB 3 0 x 2 Serial Port TX RX x 2 HDD Interface SATA 2 x 2 Onboard Storage Optional onboard eMMC Expansion Slot PCI Express x1 max 3 device LPC Bus Smbus I2C GPIO GPIO 8 bit TPM ...

Page 16: ...COM Express Module NanoCOM APL Chapter 2 Chapter 2 Hardware Information ...

Page 17: ...Chapter 2 Hardware Information 5 COM Express Module NanoCOM APL 2 1 Dimensions Jumpers and Connectors Component Side ...

Page 18: ...Chapter 2 Hardware Information 6 COM Express Module NanoCOM APL Solder Side With heat spreader ...

Page 19: ...on 7 COM Express Module NanoCOM APL 2 2 List of Switches and Connectors Please refer to the table below for all of the board s jumpers that you can configure for your application Label Function CN32 MIPI CSI CONNECTOR CN3 ROW A B ...

Page 20: ...SI CONNECTOR CN32 Pin Function 1 GND 2 MCSI_DN_1 3 MCSI_DP_1 4 GND 5 MCSI_CLKN_0 6 MCSI_CLKP_0 7 GND 8 MCSI_DN_0 9 MCSI_DP_0 10 GND 11 1 2V_VCC 12 1 8V_VCC 13 GND 14 OSC_CLK_OUT_3 15 GND 16 I2C_SCL0 17 I2C_SDA0 18 GP_CAMERASB11 19 GP_CAMERASB10 20 2 8V_VCC 21 GND 22 GND 23 GND ...

Page 21: ...LPC_AD2 A7 GBE0_MDI2 B7 LPC_AD3 A8 GBE0_LINK B8 N C A9 GBE0_MDI1 B9 N C A10 GBE0_MDI1 B10 LPC_CLK A11 GND FIXED B11 GND FIXED A12 GBE0_MDI0 B12 PWRBTN A13 GBE0_MDI0 B13 SMB_CK A14 N C B14 SMB_DAT A15 SUS_S3 B15 SMB_ALERT A16 SATA0_TX B16 SATA1_TX A17 SATA0_TX B17 SATA1_TX A18 SUS_S4 B18 SUS_STAT A19 SATA0_RX B19 SATA1_RX A20 SATA0_RX B20 SATA1_RX A21 GND FIXED B21 GND FIXED A22 USB3_RXN0 B22 USB3_...

Page 22: ...FIXED A32 AC_BITCLK B32 SPKR A33 AC_SDOUT B33 I2C_CK A34 BIOS_DIS0 B34 I2C_DAT A35 THRMTRIP B35 THRM A36 USB6 B36 USB7 A37 USB6 B37 USB7 A38 USB_6_7_OC B38 USB_4_5_OC A39 USB4 B39 USB5 A40 USB4 B40 USB5 A41 GND FIXED B41 GND FIXED A42 USB2 B42 USB3 A43 USB2 B43 USB3 A44 USB_2_3_OC B44 USB_0_1_OC A45 USB0 B45 USB1 A46 USB0 B46 USB1 A47 VCC_RTC B47 EXCD1_PERST A48 EXCD0_PERST B48 EXCD1_CPPE A49 EXCD...

Page 23: ...60 GND FIXED A61 PCIE_TX2 B61 PCIE_RX2 A62 PCIE_TX2 B62 PCIE_RX2 A63 GPI1 B63 GPO3 A64 PCIE_TX1 B64 PCIE_RX1 A65 PCIE_TX1 B65 PCIE_RX1 A66 GND B66 WAKE0 A67 GPI2 B67 WAKE1 A68 PCIE_TX0 B68 PCIE_RX0 A69 PCIE_TX0 B69 PCIE_RX0 A70 GND FIXED B70 GND FIXED A71 LVDS_A0 EDP_TX2_P B71 DDI0_PAIR0 A72 LVDS_A0 EDP_TX2_N B72 DDI0_PAIR0 A73 LVDS_A1 EDP_TX1_P B73 DDI0_PAIR1 A74 LVDS_A1 EDP_TX1_N B74 DDI0_PAIR1 ...

Page 24: ...RL A84 LVDS_I2C_DAT EDP_AUXN B84 VCC_5V_SBY A85 GPI3 B85 VCC_5V_SBY A86 EC_KBRST option B86 VCC_5V_SBY A87 DDI0_HPD_3 3S option B87 VCC_5V_SBY A88 PCIE0_CK_REF B88 BISO_DIS1 A89 PCIE0_CK_REF B89 DDI0_HPD A90 GND FIXED B90 GND FIXED A91 SPI_POWER B91 N C A92 SPI_MISO B92 N C A93 GPO0 B93 N C A94 SPI_CLK B94 N C A95 SPI_MOSI B95 DDI0_DDC_AUX_SEL A96 GND B96 N C A97 TYPE10 B97 SPI_CS A98 RS1_TX B98 D...

Page 25: ...press Module NanoCOM APL Row A Row B A103 LID B103 SLEEP A104 VCC_12V B104 VCC_12V A105 VCC_12V B105 VCC_12V A106 VCC_12V B106 VCC_12V A107 VCC_12V B107 VCC_12V A108 VCC_12V B108 VCC_12V A109 VCC_12V B109 VCC_12V A110 GND FIXED B110 GND FIXED ...

Page 26: ...COM Express Module NanoCOM APL Chapter 3 Chapter 3 AMI BIOS Setup ...

Page 27: ...check the current system configuration against the values stored in the CMOS memory If they do not match an error message will be outputted in which case you will need to run the BIOS setup program to set the configuration information in memory There are three situations in which you will need to change the CMOS settings You are starting your system for the first time You have changed your system ...

Page 28: ...when the power is turned off To enter BIOS Setup press Del or F2 immediately while your computer is powering up The function for each interface can be found below Main Date and time can be set here Press Tab to switch between date elements Advanced Enable Disable boot option for legacy network devices Chipset For hosting bridge parameters Boot Enable Disable quiet Boot Option Security The setup ad...

Page 29: ...Chapter 3 AMI BIOS Setup 17 COM Express Module NanoCOM APL 3 3 Setup submenu Main ...

Page 30: ...Chapter 3 AMI BIOS Setup 18 COM Express Module NanoCOM APL 3 4 Setup submenu Advanced ...

Page 31: ...es Disabled Optimal Default Failsafe Default Enabled Enable Disable C states EIST Disabled Enabled Optimal Default Failsafe Default Enable Disable Intel speedstep Turbo Mode Disabled Enabled Optimal Default Failsafe Default Turbo Mode Intel Virtualization Technology Disabled Enabled Optimal Default Failsafe Default ...

Page 32: ...bled a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology VT d Disabled Optimal Default Failsafe Default Enabled Enable Disable CPU VT d Thermal Monitor Disabled Enabled Optimal Default Failsafe Default Enable Disable Thermal Monitor ...

Page 33: ...d Enable or Disable the Chipset SATA Controller The Chipset SATA Controller support the 2 black internal SATA ports up to 3Gb s supported per port Port 0 Disabled Enabled Optimal Default Failsafe Default Enable or Disable SATA Port SATA Port 0 Hot Plug Capability Disabled Optimal Default Failsafe Default Enabled If enabled SATA port will be reported as Hot Plug capable ...

Page 34: ...2 COM Express Module NanoCOM APL 3 4 3 Advanced Camera Configuration Options summary IPU Enable Disable Disable Optimal Default Failsafe Default Enable Enable Disable IPU Device Please enable IPU first if you want enable camera ...

Page 35: ...Chapter 3 AMI BIOS Setup 23 COM Express Module NanoCOM APL 3 4 4 Advanced On Module Hardware Monitor ...

Page 36: ... 1 Mode Configuration Full Mode Options summary CPU Smart Fan control Full Mode Optimal Default Failsafe Default Manual Mode by PWM Auto Mode by PWM PWM signal Non inverting Optimal Default Failsafe Default Inverting Select output PWM of inverting or non inverting signal ...

Page 37: ...guration Manual Mode by PWM Options summary Manual Setting 70 Optimal Default Failsafe Default Set Fan at fixed Duty Cycle Min 0 Max 100 Please input Dec number PWM signal Non inverting Optimal Default Failsafe Default Inverting Select output PWM of inverting or non inverting signal ...

Page 38: ...efault Failsafe Default Inverting Select output PWM of inverting or non inverting signal Monitor Thermal Thermal Source 1 T1 Optimal Default Failsafe Default Thermal Source 2 T2 Select monitor thermal source Temperature of Start 30 Optimal Default Failsafe Default Temperature Of Start Temperature Of Off 20 Optimal Default Failsafe Default Temperature Of Off ...

Page 39: ...3 AMI BIOS Setup 27 COM Express Module NanoCOM APL Start PWM 40 Optimal Default Failsafe Default Start PWM Slope PWM 0 PWM 1 PWM Optimal Default Failsafe Default 2 PWM 4 PWM 8 PWM 16 PWM 32 PWM 64 PWM Slope PWM ...

Page 40: ...tup 28 COM Express Module NanoCOM APL 3 4 5 Advanced On Module FEATURES Options summary Battery Management Disable Optimal Default Failsafe Default One battery Enable to support battery in ACPI OS by I2C_CK I2C_DAT B33 B34 ...

Page 41: ...Chapter 3 AMI BIOS Setup 29 COM Express Module NanoCOM APL 3 4 6 Advanced SIO Configuration ...

Page 42: ...mary Use This Device Disabled Enabled Optimal Default Failsafe Default Enable Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 3F8 IRQ 4 DMA IO 2C8 IRQ 11 DMA Allow user to change Device s Resource settings New settings will be reflected on This Setup Page after System restarts ...

Page 43: ...mary Use This Device Disabled Enabled Optimal Default Failsafe Default Enable Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 2F8 IRQ 3 DMA IO 2D8 IRQ 10 DMA Allow user to change Device s Resource settings New settings will be reflected on This Setup Page after System restarts ...

Page 44: ...r supply mode Restore AC Power Loss Last State Optimal Default Failsafe Default Always On Always Off Select power state when power is re applied after a power failure RTC wake system from S5 Disabled Optimal Default Failsafe Default Fixed Time Dynamic Time Fixed Time System will wake on the hr min sec Specified Dynamic Time System will wake on the current time Increase minutes s ...

Page 45: ... Options summary GPI Output Input Set DIO as Input or Output Interrupt Disable Optimal Default Failsafe Default Enable Enable interrupt function with low pulse mode This triggered pulse needs more than the 10ms GPO Output Input Set DIO as Input or Output Output Level High Optimal Default Failsafe Default ...

Page 46: ...Chapter 3 AMI BIOS Setup 34 COM Express Module NanoCOM APL Low Set output level when DIO pin is output ...

Page 47: ...Chapter 3 AMI BIOS Setup 35 COM Express Module NanoCOM APL 3 5 Setup submenu Chipset ...

Page 48: ...Chapter 3 AMI BIOS Setup 36 COM Express Module NanoCOM APL 3 5 1 Chipset North Bridge Options summary Total Memory 2048 MB LPDDR4 LVDS Panel Configuration Configure LVDS panel parameters ...

Page 49: ... 3 5 1 1 North Bridge LVDS Panel Configuration Options summary Panel Type 640x480 60Hz 800x480 60Hz 800x600 60Hz 1024x600 60Hz 1024x768 60Hz Optimal Default Failsafe Default 1280x768 60Hz 1280x800 60Hz 1280x1024 60Hz 1366x768 60Hz 1440x900 60Hz 1600x1200 60Hz ...

Page 50: ...ailsafe Default 24 bit 36 bit 48 bit Select panel type Backlight Type Normal Optimal Default Failsafe Default Inverted Select backlight control signal type Backlight Level 0 10 20 30 40 50 60 70 80 Optimal Default Failsafe Default 90 100 Select backlight control level Backlight PWM Freq 100Hz 200Hz 220Hz Optimal Default Failsafe Default 500Hz ...

Page 51: ...Chapter 3 AMI BIOS Setup 39 COM Express Module NanoCOM APL 1KHz 2 2KHz 6 5KHz Select PWM frequency of backlight control signal ...

Page 52: ...Chapter 3 AMI BIOS Setup 40 COM Express Module NanoCOM APL 3 5 2 Chipset South Bridge ...

Page 53: ...ary PCIE_ Port Disabled Enabled Optimal Default Failsafe Default Control the PCI Express Root Port AUTO To disable unused root port automatically for the most optimum power savings Enable Enable PCIe root port Disable Disable PCIe root port PCIe Speed Auto Optimal Default Failsafe Default Gen1 Gen2 Configure PCIe speed ...

Page 54: ...ot provide access to many of the features in the Setup utility Select the password you wish to set press Enter to open a dialog box to enter your password you can enter no more than six letters or numbers Press Enter to confirm your entry after which you will be prompted to retype your password for a final confirmation Press Enter again after you have retyped it correctly Removing the Password Hig...

Page 55: ...e Quiet Boot option Monitor Disabled Enabled Optimal Default Failsafe Default Enable Disable Monitor Mwait To install Linux OS please set this item to disable Ipv4 PXE Support Disabled Optimal Default Failsafe Default Enabled Enable Ipv4 Boot Support If disabled IPV4 PXE boot option will not be created SCC SD Card Support Disabled Optimal Default Failsafe Default Enabled ...

Page 56: ...AEON Support for detail SCC eMMC Support Disabled Enabled Optimal Default Failsafe Default Enable Disable eMMC Support eMMC Max Speed HS400 Optimal Default Failsafe Default HS200 DDR50 Select the eMMC max Speed allowed Boot Option 1 UEFI ADATA USB Flash Drive 1100 Partition 1 Optimal Default Failsafe Default Disabled Sets the system boot order ...

Page 57: ...e NanoCOM APL 3 8 Setup submenu Save Exit Save Change and Reset Reset the system after saving the changes Discard Changes and Exit Exit system setup without saving any changes Restore Defaults Restore Load Default values for all the setup options ...

Page 58: ...COM Express Module NanoCOM APL Chapter 4 Chapter 4 Drivers Installation ...

Page 59: ...tep1 Chipset followed by SetupChipset exe 2 Follow the instructions 3 Drivers will be installed automatically Step 2 Install Graphics Driver 1 Open the Step2 Graphic folder and select your OS 2 Open the Setup exe file in the folder 3 Follow the instructions 4 Drivers will be installed automatically Step 3 Install LAN Drivers 1 Open the Step3 LAN folder followed by Autorun exe file 2 Follow the ins...

Page 60: ...er Installation 48 COM Express Module NanoCOM APL Step 5 Install USB 3 0 Driver Windows 7 only 1 Open the Step5 USB3 0 folder followed by Setup exe 2 Follow the instructions 3 Drivers will be installed automatically ...

Page 61: ...COM Express Module NanoCOM APL Appendix A Appendix A Watchdog Timer Programming ...

Page 62: ...gister Logical Device Number 0xA8 Note3 Watch dog Logical Device Number Function and Device Number 0x00 Note4 Watch dog Function Device Number Table 2 Watchdog relative register table Option Register BitNum Value Note Timer Counter 0x00 Note5 Note10 Time of watchdog timer 0 255 Counting Unit 0x01 Note6 0 Note7 0 Note11 Select time unit 0 second 1 minute Watchdog RST pulse width 0x01 Note8 3 2 Note...

Page 63: ... EcBRAMReadByte byte Offset define void IOWriteByte byte Offset byte Value define byte IOReadByte byte Offset Watch Dog relative definition Please reference to Table 2 define byte TimerReg This parameter is represented from Note5 define byte TimerVal This parameter is represented from Note10 define byte UnitReg This parameter is represented from Note6 define byte UnitBit This parameter is represen...

Page 64: ...Express Module NanoCOM APL VOID Main Procedure AaeonWDTConfig byte Timer Time of WDT timer 0x00 0xFF boolean Unit Select time unit 0 second 1 minute AaeonWDTConfig Procedure AaeonWDTEnable This procudure will enable the WDT counting AaeonWDTEnable ...

Page 65: ...parameter setting WDTParameterSetting VOID WDTEnableDisable byte Value ECBRAMWriteByte TimerReg Value VOID WDTParameterSetting Byte TempByte Watchdog Timer counter setting ECBRAMWriteByte TimerReg TimerVal WDT counting unit setting TempByte ECBRAMReadByte UnitReg TempByte UnitVal UnitBit ECBRAMWriteByte UnitReg TempByte WDT RST pulse width setting TempByte ECBRAMReadByte RSTReg TempByte RSTVal RST...

Page 66: ...RAMFnDataReg IOWriteByte EcBRAMIndex 0x13 OPReg IOWriteByte EcBRAMData Value IOWriteByte EcBRAMIndex 0x12 IOWriteByte EcBRAMData 0x30 Write start Byte ECBRAMReadByte byte OPReg IOWriteByte EcBRAMIndex 0x10 IOWriteByte EcBRAMData BRAMLDNReg IOWriteByte EcBRAMIndex 0x11 IOWriteByte EcBRAMData BRAMFnDataReg IOWriteByte EcBRAMIndex 0x12 IOWriteByte EcBRAMData 0x10 Read start IOWriteByte EcBRAMIndex 0x...

Page 67: ...COM Express Module NanoCOM APL Appendix B Appendix B I O Information ...

Page 68: ...Appendix B I O Information 56 COM Express Module NanoCOM APL B 1 I O Address Map ...

Page 69: ...Appendix B I O Information 57 COM Express Module NanoCOM APL B 2 Memory Address Map ...

Page 70: ...Appendix B I O Information 58 COM Express Module NanoCOM APL B 3 IRQ Mapping Chart ...

Page 71: ...COM Express Module NanoCOM APL Appendix C Appendix C Programming Digital I O ...

Page 72: ...0 COM Express Module NanoCOM APL C 1 DI O Programming NanoCOM APL utilizes AAEON chipset as its Digital I O controller Below are the procedures to complete its configuration which you can develop customized program to fit your application ...

Page 73: ... Device Number IO Vaule Status Function and Device Number 0x01 Note5 DIO Output Data Function Device Number Table 2 Digital I O relative register table Register Option Register BitNum Value Note GPI0 Pin Status 0x00 Note6 0 Note7 Note15 GPA2 GPI1 Pin Status 0x00 Note6 1 Note8 Note16 GPA3 GPI2 Pin Status 0x00 Note6 2 Note9 Note17 GPA4 GPI3 Pin Status 0x00 Note6 3 Note10 Note18 GPA5 GPO0 Pin Status ...

Page 74: ...Note6 define byte DIO0Bit This parameter is represented from Note7 define byte DIO1Bit This parameter is represented from Note8 define byte DIO2Bit This parameter is represented from Note9 define byte DIO3Bit This parameter is represented from Note10 define byte DIO4Bit This parameter is represented from Note11 define byte DIO5Bit This parameter is represented from Note12 define byte DIO6Bit This ...

Page 75: ...nReadPinStatus Input Example Read Digital I O Pin 3 status Output InputStatus 0 Digital I O Pin level is low 1 Digital I O Pin level is High PinStatus AaeonReadPinStatus DIO0ToDIO7Reg DIO3Bit Procedure AaeonSetOutputLevel Input Example Set Digital I O Pin 6 level AaeonSetOutputLevel DIO0ToDIO7Reg DIO6Bit DIO6Val ...

Page 76: ...onReg byte BitNum Byte TempByte TempByte ECBRAMReadByte BRAMFnData1Reg OptionReg If TempByte BitNum 0 Return 0 Return 1 VOID AaeonSetOutputLevel byte OptionReg byte BitNum byte Value Byte TempByte TempByte ECBRAMReadByte BRAMFnData1Reg OptionReg TempByte Value BitNum ECBRAMWriteByte OptionReg BitNum Value ...

Page 77: ...taReg IOWriteByte EcBRAMIndex 0x13 OPReg IOWriteByte EcBRAMData Value IOWriteByte EcBRAMIndex 0x12 IOWriteByte EcBRAMData 0x30 Write start Byte ECBRAMReadByte byte FnDataReg byte OPReg IOWriteByte EcBRAMIndex 0x10 IOWriteByte EcBRAMData BRAMLDNReg IOWriteByte EcBRAMIndex 0x11 IOWriteByte EcBRAMData FnDataReg IOWriteByte EcBRAMIndex 0x12 IOWriteByte EcBRAMData 0x10 Read start IOWriteByte EcBRAMInde...

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