Asus AAEON GENE-EHL5 User Manual Download Page 57

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Chapter 2

–

Hardware Information

3.5

” S

mp
act

ard

ENE

-E

HL5

Pin Name

Signal Type

Signal level

BT_PCM_IN

BT_PCM_OUT_CLKREQ

GND

DIFF

PCIE1_TX-

DIFF

GND

DIFF

PCIE1_RX-

DIFF

Summary of Contents for AAEON GENE-EHL5

Page 1: ...Last Updated May 26 2022 GENE EHL5 3 5 Subcompact Board User s Manual 2nd Ed ...

Page 2: ...d in this manual is intended to be accurate and reliable However the original manufacturer assumes no responsibility for its use or for any infringements upon the rights of third parties that may result from its use The material in this document is for product information only and is subject to change without notice While reasonable efforts have been made in the preparation of this document to ass...

Page 3: ...ademark of Microsoft Corp Intel Pentium and Celeron are registered trademarks of Intel Corporation Intel Core is a registered trademark of Intel Corporation ITE is a trademark of Integrated Technology Express Inc IBM PC AT PS 2 and VGA are trademarks of International Business Machines Corporation All other product names or trademarks are properties of their respective owners ...

Page 4: ...List Before setting up your product please make sure the following items have been shipped Item Quantity GENE EHL5 1 M16BT07020 Heatsink 1 If any of these items are missing or damaged please contact your distributor or sales representative immediately ...

Page 5: ...d descriptions and explanations on the product s hardware and software features if any its specifications dimensions jumper connector settings definitions and driver installation instructions if any to facilitate users in setting up their product Users may refer to the product page at AAEON com for the latest version of this document ...

Page 6: ...transient over voltage 7 Always disconnect this device from any AC supply before cleaning 8 While cleaning use a damp cloth instead of liquid or spray detergents 9 Make sure the device is installed near a power outlet and is easily accessible 10 Keep this device away from humidity 11 Place the device on a solid surface during installation to prevent falls 12 Do not cover the openings on the device...

Page 7: ...usion to the device iii Exposure to moisture iv Device is not working as expected or in a manner as described in this manual v The device is dropped or damaged vi Any obvious signs of damage displayed on the device 18 DO NOT LEAVE THIS DEVICE IN AN UNCONTROLLED ENVIRONMENT WITH TEMPERATURES BEYOND THE DEVICE S PERMITTED STORAGE TEMPERATURES SEE CHAPTER 1 TO PREVENT DAMAGE ...

Page 8: ...plosion if the battery is incorrectly replaced Replace only with the same or equivalent type recommended by the manufacturer Dispose of used batteries according to the manufacturer s instructions and your local government s recycling or disposal directives Attention Il y a un risque d explosion si la batterie est remplacée de façon incorrecte Ne la remplacer qu avec le même modèle ou équivalent re...

Page 9: ...质或元素名称及含量 AAEON Main Board Daughter Board Backplane 部件名称有毒有害物质或元素铅 Pb 汞 Hg 镉 Cd 六价铬 Cr VI 多溴联苯 PBB 多溴二苯醚 PBDE 印刷电路板及其电子组件外部信号连接器及线材 O 表示该有毒有害物质在该部件所有均质材料中的含量均在 SJ T 11363 2006 标准规定的限量要求以下 X 表示该有毒有害物质至少在该部件的某一均质材料中的含量超出 SJ T 11363 2006 标准规定的限量要求备注此产品所标示之环保使用期限系指在一般正常使用状况下 ...

Page 10: ...henyl Ethers PBDE PCB Other Components O O O O O Wires Connectors for External Connections O O O O O O O The quantity of poisonous or hazardous substances or elements found in each of the component s parts is below the SJ T 11363 2006 stipulated requirement X The quantity of poisonous or hazardous substances or elements found in at least one of the component s parts is beyond the SJ T 11363 2006 s...

Page 11: ... Selection JP4 13 2 3 5 LVDS Port Backlight Lightness Control Mode Selection JP5 13 2 3 6 Auto Power Button Enable Disable Selection JP6 13 2 3 7 COM2 Pin8 Function Selection JP8 14 2 3 8 COM3 Pin8 Function Selection JP9 14 2 3 9 SMBUS I2C Connector JP11 14 2 4 List of Connectors 15 2 4 1 Battery CN1 17 2 4 2 Touch Screen Connector CN2 17 2 4 3 Audio I O Port CN3 19 2 4 4 Amplifier R channel outpu...

Page 12: ...SB 2 0 Port CN21 38 2 4 21 USB 2 0 Port CN22 38 2 4 22 M 2 Slot B Key 2280 CN25 39 2 4 23 M 2 Slot E Key 2230 CN26 42 2 4 24 COM Port 1 4 CN27 45 2 4 25 eSPI Debug Port CN32 47 2 4 26 CPU FAN CN33 48 2 4 27 External Power Input CN34 48 2 4 28 External Power Input CN35 48 2 4 29 Front Panel Connector CN36 49 2 4 30 PSE Connector CN37 49 2 4 31 CAN BUS CN38 50 2 4 32 VGA Port CN39 51 2 4 33 External...

Page 13: ...65 3 4 4 SATA Configuration 68 3 4 5 Hardware Monitor 69 3 4 5 1 Smart Fan Mode Configuration 70 3 4 6 SIO Configuration 72 3 4 6 1 Serial Port Configuration 73 3 4 7 Serial Port Console Redirection 74 3 4 8 SCS Configuration 75 3 4 9 Power Management 76 3 4 10 Digital IO Port Configuration 77 3 5 Setup Submenu Chipset 78 3 5 1 System Agent SA Configuration 79 3 5 1 1 Memory Configuration 80 3 5 1...

Page 14: ...er 4 Driver Installation 91 4 1 Driver Download Installation 92 Appendix A I O Information 94 A 1 I O Address Map 95 A 2 Memory Address Map 97 A 3 IRQ Mapping Chart 98 A 4 DMA Channel Assignments 100 Appendix B Mating Connectors and Cables 101 B 1 Mating Connectors and Cables 102 ...

Page 15: ...3 5 Subcompact Board GENE EHL5 Chapter 1 Chapter 1 Product Specifications ...

Page 16: ...211E 2C 2T 1 30GHz up to 3 00GHz Intel Pentium J6426 4C 4T 2 00GHz up to 3 00GHz Intel Celeron J6412 4C 4T 2 00GHz up to 2 6GHz Intel Celeron N6210 2C 2T 1 20GHz up to 2 6GHz Intel Atom x6427FE x6200FE x6212RE x6414RE x6413E N6415 by customer s request CPU TDP 6W x6212RE x6211E 6 5W N6210 10W J6426 J6412 12W x6425RE x6425E CHIPSET Integrated with Intel SoC MEMORY TYPE DDR4 3200 Hz SODIMM x 1 Up to...

Page 17: ...PTION TYPICAL Intel Atom x6425E DDR4 32GB 3 26A 12V MAX Intel Atom x6425E DDR4 32GB 3 42A 12V Display CONTROLLER Intel UHD Graphics 10th Gen LVDS eDP LVDS Dual Channel 18 24bit x 1 Optional eDP 1 3 up to Full HD Display Interface HDMI 2 0b x 1 4K 60Hz DP1 4 x 1 4K x 2K 60Hz Optional VGA x 1 Multiple Display 3 Simultaneous Displays Audio CODEC REALTEK ALC269 AUDIO INTERFACE Line in Line out MIC Spe...

Page 18: ...x 1 DIO GPIO 16 Bits 8 In 8 Out SMBus I2C SMBus I2C x1 Default SMBus Touch 4 5 8 wire Touch Controller x 1 optional FAN 4 wire Smart Fan x 1 SIM Nano SIM x 1 Front Panel HDD LED PWR LED Power Button Buzzer Reset Others eMMC 5 1 32GB CANBUS x 2 TX RX Celeron J6412 and Celeron N6210 don t support CANBUS Expansion Mini PCI E mSATA M 2 E Key 2230 x 1 PCIe USB2 0 B Key 2242 x 1 PCIe x2 PCIe SATA x 1 US...

Page 19: ...ansion Default PCIe x1 PCIe x 2 select by BIOS B Key 3052 x 1 USB3 2 Gen2 Others Environment OPERATING TEMPERATURE 32 F 140 F 0 C 60 C STORAGE TEMPERATURE 40 F 176 F 40 C 80 C OPERATING HUMIDITY 0 90 relative humidity non condensing MTBF HOURS 335 427 EMC CE FCC Class A ...

Page 20: ...Chapter 1 Product Specifications 6 3 5 Subcompact Board GENE EHL5 1 2 Block Diagram ...

Page 21: ...3 5 Subcompact Board GENE EHL5 Chapter 2 Chapter 2 Hardware Information ...

Page 22: ...Chapter 2 Hardware Information 8 3 5 Subcompact Board GENE EHL5 2 1 Dimensions VGA ...

Page 23: ...Chapter 2 Hardware Information 9 3 5 Subcompact Board GENE EHL5 DP ...

Page 24: ...Chapter 2 Hardware Information 10 3 5 Subcompact Board GENE EHL5 2 2 Jumpers and Connectors ...

Page 25: ...Chapter 2 Hardware Information 11 3 5 Subcompact Board GENE EHL5 ...

Page 26: ...re Mode Selection JP3 LVDS Port Backlight Inverter VCC Selection JP4 LVDS Port Operating VDD Selection JP5 LVDS Port Backlight Lightness Control Mode Selection JP6 Auto Power Button Enable Disable Selection JP8 COM2 Pin8 Function Selection JP9 COM3 Pin8 Function Selection JP11 SMBUS I2C Connector 2 3 1 Clear CMOS Jumper JP1 Normal Default Clear CMOS 2 3 2 Touch Screen 4 5 8 Wire Selection JP2 4 8 ...

Page 27: ...rt Operating VDD Selection JP4 5V 3 3V Default 2 3 5 LVDS Port Backlight Lightness Control Mode Selection JP5 VR Mode Default PWM Mode 2 3 6 Auto Power Button Enable Disable Selection JP6 Disable Enable Default Note Use power button CN36 1 2 to power on the system when Auto Power Button is Disabled 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 ...

Page 28: ... 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 5 6 5 6 1 2 3 4 5 6 1 2 3 4 5 6 5 6 5 1 2 3 4 5 6 1 3 5 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 5 6 5 6 1 2 3 4 5 6 1 2 3 4 5 6 5 6 5 1 2 3 4 5 6 1 3 5 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4...

Page 29: ...channel output CN5 Amplifier L channel output CN6 M 2 B Key 3052 USB 3 2 GEN2 USB 2 0 CN7 Nano SIM Card Socket CN8 M 2 B Key 2242 PCIe x2 or SATA III CN9 LVDS eDP Port Inverter Backlight Connector CN10 LVDS eDP Port CN11 HDMI Port CN13 DP Port CN14 LAN RJ 45 Port1 CN15 LAN RJ 45 Port2 CN16 SATA Port CN17 5V Output for SATA HDD CN18 Digital IO Port CN19 Digital IO Port CN20 USB 3 1 Ports CN21 USB 2...

Page 30: ... CN27 COM Port 1 4 CN31 SPI Program Port CN32 eSPI Deubg Port CN33 CPU FAN CN34 External Power Input CN35 External Power Input CN36 Front Panel CN37 PSE Connector CN38 CAN BUS CN39 VGA Port CN40 External 5VSB Input CN43 LAN1 SDP connector CN44 LAN2 SDP connector DIMM1 DDR4 SODIMM ...

Page 31: ...n Pin Name Signal Type Signal Level 1 3 3V PWR 3 3V 2 GND GND 2 4 2 Touch Screen Connector CN2 8 Wires Pin Pin Name Signal Type Signal level 1 GND GND 2 TOP EXCITE IN 3 BOTTOM EXCITE IN 4 LEFT EXCITE IN 5 RIGHT EXCITE IN 6 TOP SENSE IN 7 BOTTOM SENSE IN 8 LEFT SENSE IN 9 RIGHT SENSE IN ...

Page 32: ...re Pin Pin Name Signal Type Signal level 1 GND GND 2 TOP IN 3 BOTTOM IN 4 LEFT IN 5 RIGHT IN 6 NC 7 NC 8 NC 9 NC 5 Wires Pin Pin Name Signal Type Signal level 1 GND GND 2 UL Y IN 3 UR H IN 4 LL L IN 5 LR X IN 6 SENSE S IN 7 NC 8 NC 9 NC Note Touch mode can be set by JP2 ...

Page 33: ...ENE EHL5 2 4 3 Audio I O Port CN3 Pin Pin Name Signal Type Signal level 1 LINE_R_OUT OUT 2 MIC_R IN 3 LINE_L_OUT OUT 4 MIC_L IN 5 JD_LINE OUT IN 6 JD_MIC IN IN 7 GND_AUDIO GND 8 GND_AUDIO GND 9 JD_LINE IN IN 10 LINE_R_IN IN 11 5V_AUDIO PWR 5V 12 LINE_L_IN IN ...

Page 34: ...ier R channel output CN4 Pin Pin Name Signal Type Signal level 1 SKR_R OUT 2 SKR_R OUT 2 4 5 Amplifier L channel output CN5 Pin Pin Name Signal Type Signal level 1 SKR_L OUT 2 SKR_L OUT 2 4 6 M 2 Slot B Key 3052 CN6 Pin Pin Name Signal Type Signal level 1 GND GND 2 3 3V PWR 3 3V ...

Page 35: ...V PWR 3 3V 5 GND GND 6 N C N C 7 USB_D DIFF 8 W_DISABLE IN 9 USB_D DIFF 10 SSD_DAS OUT 20 N C N C 21 GND GND 22 N C N C 23 N C N C 24 N C N C 25 N C N C 26 N C N C 27 GND GND 28 N C N C 29 USB_RX DIFF 30 UIM_RST OUT 31 USB_RX DIFF 32 UIM_CLK OUT 33 GND GND 34 UIM_DAT IN OUT 35 USB_TX DIFF 36 UIM_PWR PWR 37 USB_TX DIFF ...

Page 36: ...8 DEVSLP IN 39 GND GND 40 GF_SM_CLK OUT 41 N C N C 42 GF_SM_DAT IN OUT 43 N C N C 44 N C N C 45 GND GND 46 N C N C 47 N C N C 48 N C N C 49 N C N C 50 PERST IN 51 GND GND 52 N C N C 53 N C N C 54 PEWAKE OUT 55 N C N C 56 N C N C 57 GND GND 58 N C N C 59 N C N C 60 N C N C 61 N C N C 62 N C N C 63 N C N C ...

Page 37: ...ation 23 3 5 Subcompact Board GENE EHL5 Pin Pin Name Signal Type Signal level 64 N C N C 65 N C N C 66 N C N C 67 N C N C 68 N C N C 69 GND GND 70 3 3V PWR 3 3V 71 GND GND 72 3 3V PWR 3 3V 73 GND GND 74 3 3V PWR 3 3V 75 N C N C ...

Page 38: ...2 4 7 Nano SIM Card Socket CN7 Pin Pin Name Signal Type Signal level 1 UIM_PWR PWR 2 UIM_RST IN 3 UIM_CLK IN 4 GND GND 5 UIM_VPP PWR 6 UIM_DATA I O 2 4 8 M 2 Slot B Key 2242 CN8 Pin Pin Name Signal Type Signal level 1 GND GND 2 3 3V PWR 3 3V 3 GND GND 4 3 3V PWR 3 3V ...

Page 39: ...ND GND 6 N C N C 7 N C N C 8 W_DISABLE IN 9 N C N C 10 SSD_DAS OUT 11 GND GND 20 N C N C 21 GND GND 22 N C N C 23 N C N C 24 N C N C 25 N C N C 26 N C N C 27 GND GND 28 N C N C 29 PCIE_RX DIFF 30 N C N C 31 PCIE_RX DIFF 32 N C N C 33 GND GND 34 N C N C 35 PCIE_TX DIFF 36 N C N C 37 PCIE_TX DIFF 38 DEVSLP IN ...

Page 40: ...0_RX SATA1_RX DIFF 42 N C N C 43 PCIE0_RX SATA1_RX DIFF 44 N C N C 45 GND GND 46 N C N C 47 PCIE0_TX SATA1_TX DIFF 48 N C N C 49 PCIE0_TX SATA1_TX DIFF 50 PERST IN 51 GND GND 52 CLKREQ OUT 53 PCIE_CLK CLK 54 PEWAKE OUT 55 PCIE_CLK CLK 56 N C N C 57 GND GND 58 N C N C 59 N C N C 60 N C N C 61 N C N C 62 N C N C 63 N C N C 64 N C N C ...

Page 41: ...in Name Signal Type Signal level 65 N C N C 66 N C N C 67 N C N C 68 N C N C 69 GND GND 70 3 3V PWR 3 3V 71 GND GND 72 3 3V PWR 3 3V 73 GND GND 74 3 3V PWR 3 3V 75 N C N C Note The speed of PCIe for CN8 can be changed by BIOS and be changed to mSATA by BOM Default PCIe x2 ...

Page 42: ...ype Signal level 1 BKL_PWR PWR 5V 12V 2 BKL_PWR PWR 5V 12V 3 BKL_CONTROL OUT 4 GND GND 5 GND GND 6 BKL_ENABLE OUT 5V Note1 LVDS BKL_PWR can be set to 5V or 12V by JP3 Note2 LVDS BKL_CONTROL can be set by JP5 2 4 10 LVDS eDP Port CN10 LVDS Function Pin Pin Name Signal Type Signal level 1 BKL_ENABLE OUT 2 BKL_CONTROL OUT 3 GND GND 4 GND GND ...

Page 43: ...D 10 GND GND 11 LVDS_DA0 EDP_LANE 2 DIFF 12 LVDS_DA2 EDP_LANE 0 DIFF 13 LVDS_DA0 EDP_LANE 2 DIFF 14 LVDS_DA2 EDP_LANE 0 DIFF 15 GND GND 16 GND GND 17 LVDS_DA1 EDP_LANE 1 DIFF 18 LVDS_DA3 DIFF 19 LVDS_DA1 EDP_LANE 1 DIFF 20 LVDS_DA3 DIFF 21 GND GND 22 GND GND 23 LVDS_DB0 DIFF 24 DDC_DATA EDP_AUX I O DIFF 3 3V 25 LVDS_DB0 DIFF 26 DDC_CLK EDP_AUX I O DIFF 3 3V 27 GND GND 28 GND GND 29 LVDS_DB1 DIFF 3...

Page 44: ...S_DB1 DIFF 32 LVDS_DB2 DIFF 33 GND GND 34 GND GND 35 LVDS_B_CLK DIFF 36 LVDS_DB3 DIFF 37 LVDS_B_CLK DIFF 38 LVDS_DB3 DIFF 39 eDP HPD IN 3 3V 40 N C N C Note LVDS LCD_PWR can be set to 3 3V or 5V by JP4 2 4 11 HDMI CN11 Pin Pin Name Signal Type Signal level 1 HDMI_D2 DIFF 2 GND GND 3 HDMI_D2 DIFF 4 HDMI_D1 DIFF ...

Page 45: ...Signal level 5 GND GND 6 HDMI_D1 DIFF 7 HDMI_D0 DIFF 8 GND GND 9 HDMI_D0 DIFF 10 HDMI_CLK DIFF 11 GND GND 12 HDMI_CLK DIFF 13 N C N C 14 N C N C 15 HDMI_SLK CLK 16 HDMI_SDA IN OUT 17 GND GND 18 5V I O 5V 19 HPLG_DETECT IN 2 4 12 DP Port CN13 Pin Pin Name Signal Type Signal level 1 DP_D0 DIFF ...

Page 46: ...ignal level 2 GND GND 3 DP_D0 DIFF 4 DP_D1 DIFF 5 GND GND 6 DP_D1 DIFF 7 DP_D2 DIFF 8 GND GND 9 DP_D2 DIFF 10 DP_D3 DIFF 11 GND GND 12 DP_D3 DIFF 13 DDI2_OB_AUX_EN IN 14 GND GND 15 DP_AUX DDI2_CTRL_CLK DIFF 16 GND GND 17 DP_AUX DDI2_CTRL_DATA DIFF 18 HPLG_DETECT IN 19 GND GND 20 3 3V I O 3 3V ...

Page 47: ...tion 33 3 5 Subcompact Board GENE EHL5 2 4 13 LAN RJ 45 Port1 CN14 Pin Pin Name Signal Type Signal level 1 MDI0 DIFF 2 MDI0 DIFF 3 MDI1 DIFF 4 MDI2 DIFF 5 MDI2 DIFF 6 MDI1 DIFF 7 MDI3 DIFF 8 MDI3 DIFF 1 ACT LINK LED SPEED LED 8 ...

Page 48: ...in Pin Name Signal Type Signal level 1 MDI0 DIFF 2 MDI0 DIFF 3 MDI1 DIFF 4 MDI2 DIFF 5 MDI2 DIFF 6 MDI1 DIFF 7 MDI3 DIFF 8 MDI3 DIFF 2 4 15 SATA Port CN16 Pin Pin Name Signal Type Signal level 1 GND GND 2 SATA_TX DIFF 3 SATA_TX DIFF 4 GND GND 5 SATA_RX DIFF 1 ACT LINK LED SPEED LED 8 Pin 1 Pin 7 ...

Page 49: ...l level 6 SATA_RX DIFF 7 GND GND 2 4 16 5V Output for SATA HDD CN17 Pin Pin Name Signal Type Signal level 1 5V PWR 5V 2 GND GND 2 4 17 Digital IO Port CN18 Pin Pin Name Signal Type Signal level 1 5V PWR 5V 2 DIO1 I O 5V 3 DIO0 I O 5V 4 DIO3 I O 5V 5 DIO2 I O 5V 6 DIO5 I O 5V 7 DIO4 I O 5V 5V GND ...

Page 50: ...Name Signal Type Signal level 8 DIO7 I O 5V 9 DIO6 I O 5V 10 GND GND 2 4 18 Digital IO Port CN19 Pin Pin Name Signal Type Signal level 1 5V PWR 5V 2 DIO9 I O 5V 3 DIO8 I O 5V 4 DIO11 I O 5V 5 DIO10 I O 5V 6 DIO13 I O 5V 7 DIO12 I O 5V 8 DIO15 I O 5V 9 DIO14 I O 5V 10 GND GND ...

Page 51: ...in Pin Name Signal Type Signal level 1 5VSB PWR 5V 2 USB_D DIFF 3 USB_D DIFF 4 GND GND 5 USB_SSRX DIFF 6 USB_SSRX DIFF 7 GND GND 8 USB_SSTX DIFF 9 USB_SSTX DIFF 10 5VSB PWR 5V 11 USB_D DIFF 12 USB_D DIFF 13 GND GND 14 USB_SSRX DIFF 15 USB_SSRX DIFF 16 GND GND 17 USB_SSTX DIFF 18 USB_SSTX DIFF ...

Page 52: ... USB 2 0 Port CN21 Pin Pin Name Signal Type Signal level 1 5VSB PWR 5V 2 5VSB PWR 5V 3 USB_D0 DIFF 4 USB_D1 DIFF 5 USB_D0 DIFF 6 USB_D1 DIFF 7 GND GND 8 GND GND 9 GND GND 10 GND GND 2 4 21 USB 2 0 Port CN22 Pin Pin Name Signal Type Signal level 1 5VSB PWR 5V 2 5VSB PWR 5V ...

Page 53: ...vel 3 USB_D0 DIFF 4 USB_D1 DIFF 5 USB_D0 DIFF 6 USB_D1 DIFF 7 GND GND 8 GND GND 9 GND GND 10 GND GND 2 4 22 M 2 Slot B Key 2280 CN25 Pin Pin Name Signal Type Signal level 1 GND GND 2 3 3V PWR 3 3V 3 GND GND 4 3 3V PWR 3 3V 5 GND GND 6 N C N C 7 USB_D8 DIFF 8 W_DISABLE IN 9 USB_D8 DIFF 10 SSD_DAS OUT ...

Page 54: ...ND 20 N C N C 21 GND GND 22 N C N C 23 N C N C 24 N C N C 25 N C N C 26 N C N C 27 GND GND 28 N C N C 29 PCIE7_RX DIFF 30 N C N C 31 PCIE7_RX DIFF 32 N C N C 33 GND GND 34 N C N C 35 PCIE7_TX DIFF 36 N C N C 37 PCIE7_TX DIFF 38 N C N C 39 GND GND 40 N C N C 41 PCIE6_RX DIFF 42 N C N C 43 PCIE6_RX DIFF 44 N C N C ...

Page 55: ...D 46 N C N C 47 PCIE6_TX DIFF 48 N C N C 49 PCIE6_TX DIFF 50 PERST IN 51 GND GND 52 CLKREQ OUT 53 PCIE1_CLK CLK 54 PEWAKE OUT 55 PICE1_CLK CLK 56 N C N C 57 GND GND 58 N C N C 59 N C N C 60 N C N C 61 N C N C 62 N C N C 63 N C N C 64 N C N C 65 N C N C 66 N C N C 67 N C N C 68 N C N C 69 GND GND 70 3 3V PWR 3 3V ...

Page 56: ...PWR 3 3V 73 GND GND 74 3 3V PWR 3 3V 75 N C N C Note The speed of PCIe for CN25 can be changed by BIOS Default PCIe x1 2 4 23 M 2 Slot E Key 2230 CN26 Pin Pin Name Signal Type Signal level 1 GND GND 2 3 3V PWR 3 3V 3 USB_D DIFF 4 3 3V PWR 3 3V 5 USB_D DIFF 6 NC NC 7 GND GND 8 BT_PCM_CLK NC 9 NC NC 10 BT_PCM_FRM_CRF_RST NC ...

Page 57: ...level 11 NC NC 12 BT_PCM_IN NC 13 NC NC 14 BT_PCM_OUT_CLKREQ NC 15 NC NC 16 NC NC 17 NC NC 18 GND GND 19 NC NC 20 NC NC 21 NC NC 22 NC NC 23 NC NC 32 NC NC 33 GND GND 34 NC NC 35 PCIE1_TX DIFF 36 NC NC 37 PCIE1_TX DIFF 38 NC NC 39 GND GND 40 NC NC 41 PCIE1_RX DIFF 42 NC NC 43 PCIE1_RX DIFF 44 NC NC ...

Page 58: ..._CLK DIFF 48 N C N C 49 PCIE0_CLK DIFF 50 NC NC 51 GND GND 52 RESET IN 3 3V 53 PCIE_CLKREQ OUT 54 BT_EN IN 3 3V 55 PCIE_WAKE OUT 3 3V 56 WIFI_EN IN 3 3V 57 GND GND 58 I2C_DATA IN OUT 3 3V 59 N C N C 60 I2C_CLK IN 3 3V 61 N C N C 62 ALERT N C 3 3V 63 GND GND 64 N C N C 65 N C N C 66 N C N C 67 N C N C 68 N C N C 69 GND GND 70 N C N C ...

Page 59: ... 4 CN27 RS 232 422 485 Pin Pin Name Signal Type Signal level 1 COM1 DCD RS422_TX RS485_D IN OUT 5V 2 COM2 DCD RS422_TX RS485_D IN OUT 5V 3 COM1 RX RS422_TX RS485_D IN OUT 5V 4 COM2 RX RS422_TX RS485_D IN OUT 5V 5 COM1 TX RS422_RX OUT IN 5V 6 COM2 TX RS422_RX OUT IN 5V 7 COM1 DTR RS422_RX OUT IN 5V 8 COM2 DTR RS422_RX OUT IN 5V 9 COM1 GND GND 10 COM2 GND GND 11 COM1 DSR IN 12 COM2 DSR IN ...

Page 60: ...M3 DCD RS422_TX RS485_D IN OUT 5V 22 COM4 DCD RS422_TX RS485_D IN OUT 5V 23 COM3 RX RS422_TX RS485_D IN OUT 5V 24 COM4 RX RS422_TX RS485_D IN OUT 5V 25 COM3 TX RS422_RX OUT IN 5V 26 COM4 TX RS422_RX OUT IN 5V 27 COM3 DTR RS422_RX OUT IN 5V 28 COM4 DTR RS422_RX OUT IN 5V 29 COM3 GND GND 30 COM4 GND GND 31 COM3 DSR IN 32 COM4 DSR IN 33 COM3 RTS OUT 5V 34 COM4 RTS OUT 5V 35 COM3 CTS IN 36 COM4 CTS IN...

Page 61: ...gnal Type Signal level 39 N C N C 40 N C N C 2 4 25 eSPI Debug Port CN32 Pin Pin Name Signal Type Signal level 1 ESPI_IO0 I O 1 8V 2 ESPI_IO1 I O 3 3V 3 ESPI_IO2 I O 3 3V 4 ESPI_IO3 I O 3 3V 5 3 3V PWR 3 3V 6 ESPI_CS IN 7 ESPI_RST OUT 3 3V 8 GND GND 9 ESPI_CLK OUT 10 3 3V PWR 3 3V ...

Page 62: ...nal level 1 GND GND 2 FAN_POWER PWR 12V 3 FAN_TAC IN 4 FAN_CTL OUT 2 4 27 External Power Input CN34 Pin Pin Name Signal Type Signal level 1 12V PWR 9 36V or 12V 2 GND GND 2 4 28 External Power Input CN35 Pin Pin Name Signal Type Signal level 1 GND GND 2 GND GND 3 12V PWR 9 36V or 12V 4 12V PWR 9 36V or 12V 12V GND ...

Page 63: ...unction 1 PWR_BTN 2 PWR_BTN 3 HDD_LED 4 HDD_LED 5 SPEAKER 6 SPEAKER 7 PWR_LED 8 PWR_LED 9 H W RESET 10 H W RESET 2 4 30 PSE Connector CN37 Pin Pin Name Signal Type Signal level 1 PSE_POWER PWR 1 8V 3 3V 2 PSE_TRACE_CLK OUT 3 PSE_SW_DIO 4 PSE_TRACE_DATA0 IN OUT 5 PSE_SW_CLK 6 PSE_TRACE_DATA1 IN OUT 1 2 3 4 5 6 7 8 9 10 ...

Page 64: ...ignal level 7 PSE_TRACE_SWO 8 PSE_TRACE_DATA2 IN OUT 9 RESET OUT 10 PSE_TRACE_DATA3 IN OUT 11 UART_TX OUT 12 GND GND 13 UART_RX IN 14 N C N C 2 4 31 CAN BUS CN38 Pin Pin Name Signal Type Signal level 1 CAN_BUS_0_H IN OUT 2 CAN_BUS_0_L IN OUT 3 GND GND 4 CAN_BUS_1_H IN OUT 5 CAN_BUS_1_L IN OUT ...

Page 65: ...4 32 VGA Port CN39 Pin Pin Name Signal Type Signal level 1 RED OUT 2 GREEN OUT 3 BLUE OUT 4 NC 5 GND GND 6 RED_GND_RTN GND 7 GREEN_GND_RTN GND 8 BLUE_GND_RTN GND 9 5V PWR 5V 10 GND GND 11 NC 12 DDC_DATA I O 5V 13 HSYNC OUT 14 VSYNC OUT 15 DDC_CLK I O 5V 1 6 10 11 15 5 ...

Page 66: ...EHL5 2 4 33 External 5VSB Input CN40 Pin Pin Name Signal Type Signal level 1 PS_ON OUT 3 3V 2 GND GND 3 5VSB PWR 5V 2 4 34 LAN1 SDP Connector CN43 Pin Pin Name Signal Type Signal level 1 SDP0 IN OUT 2 SDP0 IN OUT 3 SDP0 IN OUT 4 SDP0 IN OUT 5VSB GND PS_ON 1 2 3 ...

Page 67: ...are Information 53 3 5 Subcompact Board GENE EHL5 2 4 35 LAN2 SDP Connector CN44 Pin Pin Name Signal Type Signal level 1 SDP0 IN OUT 2 SDP0 IN OUT 3 SDP0 IN OUT 4 SDP0 IN OUT 2 4 36 DDR4 SO DIMM DIMM1 Standard Version ...

Page 68: ...Chapter 2 Hardware Information 54 3 5 Subcompact Board GENE EHL5 2 5 Thermal Solution ...

Page 69: ...Chapter 2 Hardware Information 55 3 5 Subcompact Board GENE EHL5 ...

Page 70: ...N10 3 3V 5V 3 3V 1 5A or 5V 1 5A HDMI port CN11 5V 5V 0 5A DP port CN13 3 3V 3 3V 1 0A 5V Output for SATA HDD CN17 5V 5V 1 5A Digital IO Port CN18 5V 5V 0 5A Digital IO Port CN19 5V 5V 0 5A USB 3 1 Ports CN20 5VSB 5V 0 9A per channel USB 2 0 Ports CN21 5VSB 5V 0 5A per channel USB 2 0 Ports CN22 5VSB 5V 0 5A per channel M 2 B Key 2280 CN25 3 3VSB 3 3V 1 5A M 2 E Key 2230 CN26 3 3VSB 3 3V 1 5A COM ...

Page 71: ...3 5 Subcompact Board GENE EHL5 Chapter 3 Chapter 3 AMI BIOS Setup ...

Page 72: ...ration against the values stored in the CMOS memory and BIOS NVRAM If a system configuration is not found or an error is detected the module will load the default configuration and reboot automatically There are four situations in which you will need to setup system configuration 1 You are starting your system for the first time 2 You have changed the hardware attached to your system 3 The system ...

Page 73: ...when the power is turned off To enter BIOS Setup press Del or ESC immediately while your computer is powering up The function for each interface can be found below Main Date and time can be set here Press Tab to switch between date elements Advanced Access hardware monitor and advanced board features options Chipset Host bridge parameters Boot Enable Disable Quiet Boot option Security The setup ad...

Page 74: ...Chapter 3 AMI BIOS Setup 60 3 5 Subcompact Board GENE EHL5 3 3 Setup Submenu Main ...

Page 75: ...Chapter 3 AMI BIOS Setup 61 3 5 Subcompact Board GENE EHL5 3 4 Setup Submenu Advanced ...

Page 76: ... N Number of cores to enable in each processor package Intel VMX Virtualization Technology Disabled Enabled Optimal Default Failsafe Default When enabled a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology Intel SpeedStep Disabled Enabled Optimal Default Failsafe Default Allows more than two frequency ranges to be supported ...

Page 77: ...Chapter 3 AMI BIOS Setup 63 3 5 Subcompact Board GENE EHL5 3 4 2 PCH FW Configuration ...

Page 78: ... 2 1 Firmware Update Configuration Options summary Me FW Image Re Flash Enabled Disabled Optimal Default Failsafe Default Enable Disable Me FW Image Re Flash function FW Update Disabled Enabled Optimal Default Failsafe Default Enable Disable ME FW Update function ...

Page 79: ... BIOS support for security device O S will not show Security Device TCG EFI protocol and INT1A interface will not be available SHA 1 PCR Bank Disabled Optimal Default Failsafe Default Enabled Enable or Disable SHA 1 PCR Bank SHA256 PCR Bank Enabled Optimal Default Failsafe Default Disabled Enable or Disable SHA256 PCR Bank SHA384 PCR Bank Enabled Optimal Default Failsafe Default Disabled ...

Page 80: ...t Disabled Enable or Disable Platform Hierarchy Storage Hierarchy Enabled Optimal Default Failsafe Default Disabled Enable or Disable Storage Hierarchy Endorsement Hierarchy Enabled Optimal Default Failsafe Default Disabled Enable or Disable Endorsement Hierarchy TPM 2 0 UEFI Spec Version TCG_2 Optimal Default Failsafe Default TCG_1_2 Select the TCH2 Spec Version Support TCG_1_2 the Compatible mod...

Page 81: ...elect Auto Optimal Default Failsafe Default TPM 1 2 TPM 2 0 TPM 1 2 will restrict support to TPM 1 2 devices TPM 2 0 will restrict support to TPM 2 0 devices Auto will support both with the default set to TPM 2 0 devices if not found TPM 1 2 devices will be enumerated ...

Page 82: ...pact Board GENE EHL5 3 4 4 SATA Configuration Options summary SATA Controller s Enabled Optimal Default Failsafe Default Disabled Enable Disable SATA Device Port Enabled Optimal Default Failsafe Default Disabled Enable or Disable SATA Port ...

Page 83: ...Chapter 3 AMI BIOS Setup 69 3 5 Subcompact Board GENE EHL5 3 4 5 Hardware Monitor Options summary Smart Fan Disable Enable Optimal Default Failsafe Default Enables or Disables Smart Fan ...

Page 84: ...ear Fan Application Output PWM mode push pull Optimal Default Failsafe Default Fan 1 Smart Fan Control Manual Duty Mode Auto Duty Cycle Mode Optimal Default Failsafe Default Smart Fan Mode Select Temperature Source CPU PECI Temperature System Temperature Optimal Default Failsafe Default System Temperature 2 Select the monitored temperature source for this fan ...

Page 85: ...Chapter 3 AMI BIOS Setup 71 3 5 Subcompact Board GENE EHL5 Temperature 1 60 Duty Cycle 1 85 Auto fan speed control Fan speed will follow different temperature by different duty cycle 1 100 ...

Page 86: ...Chapter 3 AMI BIOS Setup 72 3 5 Subcompact Board GENE EHL5 3 4 6 SIO Configuration ...

Page 87: ...t Failsafe Default Enable or Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 3F8h IRQ 4 IO 2F8h IRQ 3 Allows user to change Device s Resource settings New settings will be reflected on This Setup Page after System restarts Mode RS232 Optimal Default Failsafe Default RS422 RS485 UART RS232 422 485 selection ...

Page 88: ...Serial Port Console Redirection Options summary Console Redirection Disabled Optimal Default Failsafe Default Enabled Console Redirection Enable or Disable Console Redirection EMS Disabled Optimal Default Failsafe Default Enabled Console Redirection Enable or Disable ...

Page 89: ... 5 1 Controller eMMC 5 1 HS400 Mode Disabled Enabled Optimal Default Failsafe Default Enable or Disable SCS eMMC 5 1 HS400 Mode Enable HS400 software tuning Disabled Optimal Default Failsafe Default Enabled Software tuning should improve eMMC HS400 stability at the expense of boot time Driver Strength 33 Ohm 40 Ohm Optimal Default Failsafe Default 50 Ohm Sets I O driver strength ...

Page 90: ...wer supply mode Restore AC Power Loss Last State Optimal Default Failsafe Default Always On Always Off Select power state when power is re applied after a power failure RTC wake system from S5 Disable Optimal Default Failsafe Default Fixed Time Fixed Time System will wake on the hr min sec specified n Dynamic Time System will wake on the current time Increase minute s ...

Page 91: ...AMI BIOS Setup 77 3 5 Subcompact Board GENE EHL5 3 4 10 Digital IO Port Configuration Options summary DIO Port Output Input Set DIO as Input or Output Output Level High Low Set output level when DIO pin is output ...

Page 92: ...Chapter 3 AMI BIOS Setup 78 3 5 Subcompact Board GENE EHL5 3 5 Setup Submenu Chipset ...

Page 93: ...Chapter 3 AMI BIOS Setup 79 3 5 Subcompact Board GENE EHL5 3 5 1 System Agent SA Configuration Options summary VT d Disabled Enabled Optimal Default Failsafe Default VT d capability ...

Page 94: ...Chapter 3 AMI BIOS Setup 80 3 5 Subcompact Board GENE EHL5 3 5 1 1 Memory Configuration Options summary In Band ECC Disabled Optimal Default Failsafe Default Enabled Enable Disable In Band ECC ...

Page 95: ... LVDS Disabled Enabled Optimal Default Failsafe Default Enable Disabled this panel LVDS Panel Type 640x480 18bit 60Hz 800x480 18bit 60Hz 800x600 18bit 60Hz 1024x600 18bit 60Hz 1024x768 18bit 60Hz 1024x768 24bit 60Hz Optimal Default Failsafe Default 1280x768 24bit 60Hz 1280x1024 48bit 60Hz 1366x768 24bit 60Hz ...

Page 96: ...s Device by selecting the appropriate setup item Panel Mode Single Channel Optimal Default Failsafe Default Dual Channel Panel mode selection for Single channel or Dual channel Color Depth 18 bit Optimal Default Failsafe Default 24 bit 36 bit 48 bit Select panel type Backlight Mode BIOS Application Windows Slider Optimal Default Failsafe Default Select backlight control signal type ...

Page 97: ...hen the user enters the Setup utility A User Password does not provide access to many of the features in the Setup utility Select the password you wish to set and press Enter In the dialog box enter your password must be between 3 and 20 letters or numbers Press Enter and retype your password to confirm Press Enter again to set the password Removing the Password Select the password you want to rem...

Page 98: ... User mode The mode change requires platform reset Secure Boot Mode Custom Optimal Default Failsafe Default Standard Secure Boot mode options Standard or Custom In Custom mode Secure Boot Policy variables can be configured by a physically present user without full authentication Restore Factory Keys Force System to User Mode Install factory default Secure Boot key databases Reset To Setup Mode Del...

Page 99: ... is Enabled Platform Key PK is enrolled and the System is in User mode The mode change requires platform reset Restore Factory Keys Force System to User Mode Install factory default Secure Boot key databases Reset To Setup Mode Delete all Secure Boot key databases from NVRAM Export Secure Boot variables Copy NVRAM content of Secure Boot variables to files in a root folder on a file system device E...

Page 100: ... Device Guard ready system must not list Microsoft UEFI CA Certificate in Authorized Signature database db Restore DB defaults Restore DB variable to factory defaults Platform Key PK Details Export Update Delete Key Exchange Keys Details Export Update Append Delete Authorized Signatures Details Export Update Append Delete Forbidden Signatures Details Export Update Append Delete Authorized TimeStam...

Page 101: ...Signatures Update Append Enroll Factory Defaults or load certificates from a file 1 Public Key Certificate a EFI_SIGNATURE_LIST b EFI_CERT_X509 DER c EFI_CERT_RSA2048 bin d EFI_CERT_SHAXXX 2 Authenticated UEFI Variable 3 EFI PE COFF Image SHA256 Key Source Factory External Mixed ...

Page 102: ...nu Boot Options summary Quiet Boot Disabled Enabled Optimal Default Failsafe Default Enable or Disable Quiet Boot option UEFI PXE Support Disabled Optimal Default Failsafe Default Enabled Enable Disable UEFI Network Stack FIXED BOOT ORDER Priorities Sets the system boot order ...

Page 103: ...Chapter 3 AMI BIOS Setup 89 3 5 Subcompact Board GENE EHL5 3 7 1 BBS Priorities ...

Page 104: ... EHL5 3 8 Setup Submenu Save Exit Options summary Save Changes and Reset Reset the system after saving the changes Discard Changes and Exit Exit system setup without saving any changes Restore Defaults Restore Load Default values for all the setup options ...

Page 105: ...3 5 Subcompact Board GENE EHL5 Chapter 4 Chapter 4 Driver Installation ...

Page 106: ...install them Step 1 Install Chipset Drivers 1 Open the Intel Chipset folder 2 Run the SetupChipset exe in the folder 3 Follow the instructions 4 Drivers will be installed automatically Step 2 Install Graphics Drivers 1 Open the Intel Graphics folder 2 Run the igxpin exe file in the folder 3 Follow the instructions 4 Drivers will be installed automatically Step 3 Install LAN Driver 1 Open the Intel...

Page 107: ...ructions 3 Drivers will be installed automatically Step 6 Install ME Drivers 1 Open the ME folder 2 Run the SetupME exe file in the folder 3 Follow the instructions 4 Drivers will be installed automatically Step 7 Install Touch Drivers 1 Open the Touch folder 2 Run the Setup exe file in the folder 3 Follow the instructions 4 Drivers will be installed automatically Step 8 Peripheral Drivers 1 Open ...

Page 108: ...3 5 Subcompact Board GENE EHL5 Appendix A Appendix A I O Information ...

Page 109: ...Appendix A I O Information 95 3 5 Subcompact Board GENE EHL5 A 1 I O Address Map ...

Page 110: ...Appendix A I O Information 96 3 5 Subcompact Board GENE EHL5 ...

Page 111: ...Appendix A I O Information 97 3 5 Subcompact Board GENE EHL5 A 2 Memory Address Map ...

Page 112: ...Appendix A I O Information 98 3 5 Subcompact Board GENE EHL5 A 3 IRQ Mapping Chart ...

Page 113: ...Appendix A I O Information 99 3 5 Subcompact Board GENE EHL5 ...

Page 114: ...Appendix A I O Information 100 3 5 Subcompact Board GENE EHL5 A 4 DMA Channel Assignments ...

Page 115: ...3 5 Subcompact Board GENE EHL5 Appendix B Appendix B Mating Connectors and Cables ...

Page 116: ... CN3 Audio IO Port JCTC HSG 11002H0 0 2 6P TER 11002TO P 2E Audio Cable 170X000156 CN4 Amplifier R channel output Molex 51021 0200 N A N A CN5 Amplifier L channel output Molex 51021 0200 N A N A CN9 LVDS eDP Port Inverter Backlight Connector SHR HSG WL1010H 6P TER KB901 10T LVDS Inverter Cable 170X000152 CN10 LVDS Port SHDR HSG WL1010H 2 2 0P TER KB901 10T LVDS Cable 170X000280 EDP Port JCTC HSG 1...

Page 117: ... H0 001 USB2 0 Cable 170010010D CN27 COM Port 1 4 JCTC HSG 11002H0 0 2 20P TER 11002TO P 2E COM Cable 170X000317 CN32 eSPI Debug Port JST SHR 10V S B N A N A CN33 CPU FAN Molex 47054 1000 N A N A CN34 External Power Input Molex 19211 0003 Power Cable 170204010R CN36 Front Panel Molex 51110 1050 N A N A CN38 CAN BUS Molex 51021 0500 N A N A CN40 External 5VSB Input JST XHP 3 ATX Cable 170220020B CN...

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