Asus Aaeon BOXER-8332AI User Manual Download Page 75 | Manualshive

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Chapter 3

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AMI BIOS Setup

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Options Summary

Platform Hierarchy

Enabled

Optimal Default, Failsafe Default

Disabled

Enable or Disable Platform Hierarchy
Storage Hierarchy

Enabled

Optimal Default, Failsafe Default

Disabled

Enable or Disable Storage Hierarchy
Endorsement Hierarchy Enabled

Optimal Default, Failsafe Default

Disabled

Enable or Disable Endorsement Hierarchy
TPM2.0 UEFI Spec
Version

TCG_2

Optimal Default, Failsafe Default

TCG_1_2

Select the TCG2 Spec Version Support
TCG_1_2: Compatible mode for Win8/Win10
TCG_2: Support new TCG2 protocol and event format for Win10 or later
Physical Presence Spec
Version

1.3

Optimal Default, Failsafe Default

1.2

Select to Tell O.S. to support PPI Spec Version 1.2 or 1.3. Note some HCK tests might
not support 1.3.
Device Select

Auto

Optimal Default, Failsafe Default

TPM 1.2

TPM 2.0

TPM 1.2 will restrict support to TPM 1.2 devices, TPM 2.0 will restrict support to TPM
2.0 devices, Auto will support both with the default set to TPM 2.0 devices if not
found, TPM 1.2 devices will be enumerated

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Summary of Contents for Aaeon BOXER-8332AI

Page 1: ...Last Updated October 7 2021 BOXER 8332AI Embedded AI Vision System User s Manual 1st Ed ...

Page 2: ...vided in this manual is intended to be accurate and reliable However the original manufacturer assumes no responsibility for its use or for any infringements upon the rights of third parties that may result from its use The material in this document is for product information only and is subject to change without notice While reasonable efforts have been made in the preparation of this document to...

Page 3: ...Microsoft Corp Intel Pentium Celeron and Xeon are registered trademarks of Intel Corporation Intel Core is a trademarkof Intel Corporation NVIDIA and Tesla are registered trademarks of NVIDIA Corporation All other product names or trademarks are properties oftheir respective owners The publisher of this document does not assume nor imply ownership of any trademarked product not listed herein ...

Page 4: ...e make sure the following items have been shipped Item Quantity BOXER 8332AI CFL 1 NVIDIA Tesla T4 1 Wallmount Bracket 2 3 Pin DC In Power Connector 1 Screw Package 1 Thermal Pad Package 1 If any of these items are missing or damaged please contact your distributor or sales representative immediately ...

Page 5: ...ailed descriptions and explanations on the product s hardware and software features if any its specifications dimensions jumper connector settings definitions and driver installation instructions if any to facilitate users in setting up their product Users may refer to the product page at AAEON com for the latest version of this document ...

Page 6: ...by transient over voltage 7 Always disconnect this device from any power supply before cleaning 8 While cleaning use a damp cloth instead of liquid or spray detergents 9 Make sure the device is installed near a power outlet and is easily accessible 10 Keep this device away from humidity 11 Place the device on a solid surface during installation to prevent falls 12 Do not cover the openings on the ...

Page 7: ... uncontrolled environment with temperatures beyond the device s permitted storage temperatures see chapter 1 to prevent damage 19 Do NOT disassemble the motherboard so as not to damage the system or void your warranty 20 If the thermal pad had been damaged please contact AAEON s salesperson to purchase a new one Do NOT use those of other brands 21 The Hex Cylinder Coppers on the front panel are no...

Page 8: ...f explosion if the battery is incorrectly replaced Replace only with the same or equivalent type recommended by the manufacturer Dispose of used batteries according to the manufacturer s instructions and your local government s recycling or disposal directives Attention Il y a un risque d explosion si la batterie est remplacée de façon incorrecte Ne la remplacer qu avec le même modèle ou équivalen...

Page 9: ...害物质或元素铅 Pb 汞 Hg 镉 Cd 六价铬 Cr VI 多溴联苯 PBB 多溴二苯醚 PBDE 印刷电路板及其电子组件外部信号连接器及线材外壳中央处理器与内存硬盘液晶模块光驱触控模块电源电池本表格依据 SJ T 11364 的规定编制表示该有毒有害物质在该部件所有均质材料中的含量均在 GB T 26572标准规定的限量要求以下表示该有害物质的某一均质材料超出了GB T 26572的限量要求然而该部件仍符合欧盟指令2011 65 EU 的规范备注一此产品所标示之环保使用期限系指在一般正常使用状况下二上述部件物质中央处理器内存硬盘光驱电源为选购品三上述部件物质液晶模块触控模块仅一体机产品适用 ...

Page 10: ... O O O PSU X O O O O O Battery X O O O O O This form is prepared in compliance with the provisions of SJ T 11364 O The level of toxic or hazardous materials present in this component and its parts is below the limit specified by GB T 26572 X The level of toxic of hazardous materials present in the component exceed the limits specified by GB T 26572 but is still in compliance with EU Directive 2011...

Page 11: ...ection for Mini Card Slot JP5 11 2 3 5 PCIe x16 Lanes Normal Reversed JP11 11 2 3 6 Auto Power Button Selection JP20 12 2 4 List of Connectors 13 2 4 1 PCIe x4 Slot CN5 15 2 4 2 Audio I O Port 10P Pitch 1 25mm CN7 18 2 4 3 Dual HDMI Port CN8 18 2 4 4 LAN RJ 45 Dual USB3 0 CN9 19 2 4 5 LAN RJ 45 Dual USB3 0 CN10 21 2 4 6 LAN RJ 45 Dual USB 3 0 CN11 23 2 4 7 CPU FAN Connector CN12 25 2 4 8 System FA...

Page 12: ...N34 38 2 4 23 COM Port 5 Wafer Box Optional CN35 39 2 4 24 COM Port 6 Wafer Box Optional CN36 40 2 4 25 Mini Card Slot Full Sized CN37 41 2 4 26 SIM Slot CN38 43 2 4 27 Mini Card Slot Half Sized CN39 44 2 4 28 USB2 0 Wafer Box CN40 CN41 CN42 CN43 46 2 4 29 Audio Jack Connector CN44 47 2 4 30 Audio Connector Wafer Box 48 2 4 31 DC IN Connector CN48 49 2 4 32 GPU DC IN Connector CN50 CN51 49 2 4 33 ...

Page 13: ...ort 2 Configuration 74 3 4 7 3 Serial Port 3 Configuration 75 3 4 7 4 Serial Port 4 Configuration 76 3 4 8 Network Stack Configuration 77 3 4 9 Digital IO Port Configuration 79 3 4 10 Power Management 80 3 5 Setup Submenu Chipset 82 3 5 1 System Agent SA Configuration 83 3 5 2 PEG Port Configuration 85 3 5 3 PCH IO Configuration 86 3 6 Setup Submenu Security 87 3 6 1 Secure Boot 88 3 6 1 1 Key Man...

Page 14: ...B 1 I O Address Map 105 B 2 IRQ Mapping Chart 107 B 3 Memory Address Map 117 Appendix C Digital I O Ports 118 C 1 DIO Introduction 119 C 2 Electrical Specifications for Digital I O Ports 119 C 3 DIO Programming 120 C 4 Digital I O Register 121 C 5 Digital I O Sample Program 122 Appendix D Glue Removal Procedure 128 D 1 Removing Glue from Y our System 129 ...

Page 15: ...Embedded AI Vision System BOXER 8332AI Chapter 1 Chapter 1 Product Specifications ...

Page 16: ...s max 2666MHz up to 128GB Supports un buffered and ECC non ECC type SODIMM Display Interface HDMI 1 4 x 2 Supports Dual Independent 4K Ultra HD Displays Storage Device 2 5 SATA Drive Bay x 2 4 x SATA Port w RAID Function Half Size Mini Card x 1 for mSATA optional M 2 2280 NVMe slot x 1 Ethernet 3 x RJ 45 Gigabit LAN Ports 2 x Intel i211AT 1 x Intel i219LM I O 6 x USB3 2 Gen 1 Type A 1 x Mic in 1 x...

Page 17: ...onnector Internal 2 x SATA 1 x 8 bit DIO 4 x USB2 0 1 x LPC 1 x Secondary System Fan Connector Indicator 1 x System Power LED Green 1 x Storage Activity LED Red OS Support Windows 10 64 bit Linux Ubuntu 20 04 1 Kernel 5 4 Power Supply Power Requirement 1 x 3 pin Terminal Block DC In 12 24V Mechanical Mounting Wall mount Dimensions W x H x D 8 66 x 5 91 x 11 02 220mm x 150mm x 280mm Gross Weight 17...

Page 18: ...ntal Operating Temperature 32 F 104 F 0 C 40 C IEC68 2 with 0 5 m s airflow Storage Temperature 49 F 176 F 45 C 80 C Storage Humidity 5 95 at 40 C non condensing Anti Vibration with SSD 1Grms 5 500Hz operation Shock With SSD 5G at wall mount half sine 11ms Certification CE FCC class A ...

Page 19: ...Embedded AI Vision System BOXER 8332AI Chapter 2 Chapter 2 Hardware Information ...

Page 20: ...Chapter 2 Hardware Information 6 Embedded AI Vision System BOXER 8332AI 2 1 Dimensions ...

Page 21: ...Chapter 2 Hardware Information 7 Embedded AI Vision System BOXER 8332AI ...

Page 22: ...Chapter 2 Hardware Information 8 Embedded AI Vision System BOXER 8332AI Main Board ...

Page 23: ...Chapter 2 Hardware Information 9 Embedded AI Vision System BOXER 8332AI 2 2 Jumpers and Connectors ...

Page 24: ... Control Selection JP4 PCIe and SATA bus selection for M 2 slot JP5 PCIe and SATA bus selection for Mini Card slot JP11 PCIe x16 lane normal reversed selection JP20 Auto Power Button Selection 2 3 1 PCIe x16 Bifurcation Selection JP1 JP2 To set bifurcation selection you must set jumpers on both JP1 and JP2 according to this chart Setting JP1 JP2 PCIe x16 x 1 Default PCIe x8 x 2 PCIe x8 x 1 and PCI...

Page 25: ...mal Default Clear CMOS 2 3 3 PCIe SATA Selection for M 2 Slot JP4 SATA Bus PCIe Bus Default 2 3 4 PCIe SATA Selection for Mini Card Slot JP5 SATA Bus PCIe Bus Default 2 3 5 PCIe x16 Lanes Normal Reversed JP11 Lane Numbers Normal Lane Numbers Reversed Default 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 ...

Page 26: ...Chapter 2 Hardware Information 12 Embedded AI Vision System BOXER 8332AI 2 3 6 Auto Power Button Selection JP20 ATX Default AT 1 2 3 1 2 3 ...

Page 27: ... CN4 SO DIMM Channel B1 CN5 PCIe x4 slot CN6 PCIe x16 slot CN7 VGA box connector CN8 Dual HDMI port CN9 LAN RJ 45 Dual USB3 0 Connector CN10 LAN RJ 45 Dual USB3 0 Connector CN11 LAN RJ 45 Dual USB3 0 Connector CN12 CPU FAN connector CN13 System FAN connector CN14 M 2 slot connector 2280 CN15 PS 2 Connector CN16 Remote button connector CN17 PS_ON Connector CN18 SPI ROM connector CN19 LPC bus connec...

Page 28: ...RS232 RS422 RS485 CN33 COM3 HEADER RS232 RS422 RS485 CN34 COM4 HEADER RS232 RS422 RS485 CN35 COM5 HEADER RS232 RS422 RS485 CN36 COM6 HEADER RS232 RS422 RS485 CN37 Mini PCIe slot Full Size CN38 SIM card slot CN39 Mini PCIe slot Half Size CN40 USB2 0 box connector CN41 USB2 0 box connector CN42 USB2 0 box connector CN43 USB2 0 box connector CN44 Audio connector CN45 Audio box connector CN48 Power in...

Page 29: ...e x4 Slot CN5 Pin Pin Name Signal Type Signal Level A1 PRSNT1 I O A2 12V PWR V12S A3 12V PWR V12S A4 GND GND A5 PCIE_TXN5 DIFF A6 PCIE_TXP5 DIFF A7 PCIE_RXN5 DIFF A8 PCIE_RXP5 DIFF A9 3 3V PWR V3 3S A10 3 3V PWR V3 3S A11 PERST I O A12 GND GND A13 PCIE_x4SLOT_CLK DIFF A14 PCIE_x4SLOT_CLK DIFF A15 GND GND A16 PCIE_RXP24 DIFF ...

Page 30: ...GND GND A21 PCIE_RXP23 DIFF A22 PCIE_RXN23 DIFF A23 GND GND A24 GND GND A25 PCIE_RXP22 DIFF A26 PCIE_RXP22 DIFF A27 GND GND A28 GND GND A29 PCIE_RXP21 DIFF A30 PCIE_RXN21 DIFF A31 GND GND A32 NC B1 12V PWR V12S B2 12V PWR V12S B3 12V PWR V12S B4 GND GND B5 SMB_CLK I O B6 SMB_DATA I O B7 GND GND B8 V3 3S PWR V3 3S B9 NC B10 3 3Vaux PWR V3 3A B11 WAKE I O ...

Page 31: ...l B12 NC B13 GND GND B14 PCIE_TXP24 DIFF B15 PCIE_TXN24 DIFF B16 GND GND B17 PRSNT I O B18 GND GND B19 PCIE_TXP23 DIFF B20 PCIE_TXN23 DIFF B21 GND GND B22 GND GND B23 PCIE_TXP22 DIFF B24 PCIE_TXN22 DIFF B25 GND GND B26 GND GND B27 PCIE_TXP21 DIFF B28 PCIE_TXN21 DIFF B29 GND GND B30 NC B31 PRSNT I O B32 GND GND ...

Page 32: ...4 2 Audio I O Port 10P Pitch 1 25mm CN7 Pin Pin Name Signal Type Signal Level 1 MIC_L IN 2 MIC_R IN 3 GND_AUDIO GND 4 LINE_L_IN IN 5 LINE_R_IN IN 6 GND_AUDIO GND 7 LEFT_OUT OUT 8 GND_AUDIO GND 9 RIGHT_OUT OUT 10 5V_AUDIO PWR 5V 2 4 3 Dual HDMI Port CN8 Standard Specifications ...

Page 33: ...ystem BOXER 8332AI 2 4 4 L AN RJ 45 Dual USB3 0 CN9 Note DualUSB3 0 ports are USB3 2 Gen 2 10 Gbps specification LAN RJ 45 Pin Pin Name Signal Type Signal Level 1 MDI0 DIFF 2 MDI0 DIFF 3 MDI1 DIFF 4 MDI2 DIFF 5 MDI2 DIFF 6 MDI1 DIFF 7 MDI3 DIFF 8 MDI3 DIFF ...

Page 34: ... Pin Name Signal Type Signal Level 1 5VSB PWR 5V 2 USB1_D DIFF 3 USB1_D DIFF 4 GND GND 5 USB1_SSRX DIFF 6 USB1_SSRX DIFF 7 GND GND 8 USB1_SSTX DIFF 9 USB1_SSTX DIFF 10 5VSB PWR 5V 11 USB2_D DIFF 12 USB2_D DIFF 13 GND GND 14 USB2_SSRX DIFF 15 USB2_SSRX DIFF 16 GND GND 17 USB2_SSTX DIFF 18 USB2_SSTX DIFF ...

Page 35: ...stem BOXER 8332AI 2 4 5 L AN RJ 45 Dual USB3 0 CN10 Note DualUSB3 0 ports are USB3 2 Gen 2 10 Gbps specification LAN RJ 45 Pin Pin name Signal Type Signal Level 1 MDI0 DIFF 2 MDI0 DIFF 3 MDI1 DIFF 4 MDI2 DIFF 5 MDI2 DIFF 6 MDI1 DIFF 7 MDI3 DIFF 8 MDI3 DIFF ...

Page 36: ... Pin Name Signal Type Signal Level 1 5VSB PWR 5V 2 USB3_D DIFF 3 USB3_D DIFF 4 GND GND 5 USB3_SSRX DIFF 6 USB3_SSRX DIFF 7 GND GND 8 USB3_SSTX DIFF 9 USB3_SSTX DIFF 10 5VSB PWR 5V 11 USB4_D DIFF 12 USB4_D DIFF 13 GND GND 14 USB4_SSRX DIFF 15 USB4_SSRX DIFF 16 GND GND 17 USB4_SSTX DIFF 18 USB4_SSTX DIFF ...

Page 37: ...stem BOXER 8332AI 2 4 6 L AN RJ 45 Dual USB 3 0 CN11 Note DualUSB3 0 ports are USB3 2 Gen 2 10 Gbps specification LAN RJ 45 Pin Pin Name Signal Type Signal Level 1 MDI0 DIFF 2 MDI0 DIFF 3 MDI1 DIFF 4 MDI2 DIFF 5 MDI2 DIFF 6 MDI1 DIFF 7 MDI3 DIFF 8 MDI3 DIFF ...

Page 38: ... Pin Name Signal Type Signal Level 1 5VSB PWR 5V 2 USB5_D DIFF 3 USB5_D DIFF 4 GND GND 5 USB5_SSRX DIFF 6 USB5_SSRX DIFF 7 GND GND 8 USB5_SSTX DIFF 9 USB5_SSTX DIFF 10 5VSB PWR 5V 11 USB6_D DIFF 12 USB6_D DIFF 13 GND GND 14 USB6_SSRX DIFF 15 USB6_SSRX DIFF 16 GND GND 17 USB6_SSTX DIFF 18 USB6_SSTX DIFF ...

Page 39: ... 4 7 CPU FAN Connector CN12 Pin Pin Name Signal Type Signal Level 1 GND GND 2 VCC_FAN_CPU_CON PWR 12V 3 FAN_TAC_CPU_CON IN 4 FAN_CTL_CPU_CON OUT 2 4 8 System FAN Connector CN13 Pin Pin Name Signal Type Signal Level 1 GND GND 2 VCC_FAN_CPU_CON PWR 12V 3 FANIN2 IN 4 FANCTL2 OUT ...

Page 40: ...N14 Pin Pin Name Signal Type Signal Level Top Odd 1 GND GND 3 GND GND 5 PCIE_RXN16 IN 7 PCIE_RXP16 IN 9 GND GND 11 PCIE_TXN16 OUT 13 PCIE_TXP16 OUT 15 GND PWR 17 PCIE_RXN15 IN 19 PCIE_RXP15 IN 21 GND PWR 23 PCIE_TXN15 OUT 25 PCIE_TXP15 OUT 27 GND PWR 29 PCIE_RXN14 IN 31 PCIE_RXP14 IN 33 GND GND ...

Page 41: ... PCIE_RXP13 SATA0A_RXP IN 43 PCIE_RXN13 SATA0A_RXN IN 45 GND GND 47 PCIE_TXN13 SATA0A_TXN OUT 49 PCIE_TXP13 SATA0A_TXP OUT 51 GND PWR 53 PCIE_M 2_CLK OUT 55 PCIE_M 2_CLK OUT 57 GND GND 67 NC 69 M 2_SATA_PCIE_DET_C OUT 71 GND GND 73 GND GND 75 GND GND Bottom Even 2 3 3V PWR 3 3V 4 3 3V PWR 3 3V 6 NC 8 NC 10 NC 12 3 3V PWR 3 3V 14 3 3V PWR 3 3V 16 3 3V PWR 3 3V ...

Page 42: ... 8332AI Pin Pin Name Signal Type Signal Level 18 3 3V PWR 3 3V 20 NC 22 NC 24 NC 26 NC 28 NC 30 NC 32 NC 34 NC 36 NC 38 DEVSLP IN 40 NC 42 NC 44 NC 46 NC 48 NC 50 RESET IN 52 CLKREQ OUT 54 WAKE OUT 56 NC 58 NC 68 NC 70 3 3V PWR 3 3V 72 3 3V PWR 3 3V 74 3 3V PWR 3 3V ...

Page 43: ...N16 Pin Pin Name Signal Type Signal Level 1 PWR_BUTTON IN 3 GND GND 2 4 11 PS_ON Connector Pin Pin Name Signal Type Signal Level 1 PS_ON OUT 2 GND GND 2 4 12 SPI Flash Port CN18 Pin Pin Name Signal Type Signal Level 1 SPI_MISO OUT 2 GND GND 3 SPI_CLK IN 4 3 3VSB PWR 3 3V 5 SPI_MOSI IN 6 SPI_CS IN 7 NC 8 NC ...

Page 44: ...ystem BOXER 8332AI 2 4 13 LPC Connector CN19 Pin Pin Name Signal Type Signal Level 1 LAD0 I O 3 3V 2 LAD1 I O 3 3V 3 LAD2 I O 3 3V 4 LAD3 I O 3 3V 5 3 3V PWR 3 3V 6 LFRAME IN 7 LRESET OUT 3 3V 8 GND GND 9 LCLK OUT 10 SMCLK IN 11 SMDAT IN 12 SERIRQ I O 3 3V ...

Page 45: ... CN24 CN26 Pin Pin Name Signal Type Signal Level 1 GND GND 2 SATA_TX DIFF 3 SATA_TX DIFF 4 GND GND 5 SATA_RX DIFF 6 SATA_RX DIFF 7 GND GND 2 4 15 SATA Power Connector CN21 CN22 CN25 CN27 Pin Pin Name Signal Type Signal Level 1 12V PWR 12V 2 GND GND 3 GND GND 4 5V PWR 5V Pin 1 Pin 7 12V 1 2 3 4 GND GND 5V ...

Page 46: ...R 8332AI 2 4 16 Digital IO Port CN28 Pin Pin Name Signal Type Signal Level 1 DIO0 I O 5V 2 DIO1 I O 5V 3 DIO2 I O 5V 4 DIO3 I O 5V 5 DIO4 I O 5V 6 DIO5 I O 5V 7 DIO6 I O 5V 8 DIO7 I O 5V 9 5V PWR 5V 10 GND GND DIO1 DIO3 DIO5 DIO7 GND DIO0 1 2 9 10 DIO2 DIO4 DIO6 5V ...

Page 47: ... Pin Name Signal Type RS 422 RS 485 1 DCD1 IN RS422_TX RS485_D 2 RX1 IN RS422_TX RS485_D 3 TX1 OUT RS422_RX 4 DTR1 OUT RS422_RX 5 GND GND 6 DSR1 IN 7 RTS1 OUT 8 CTS1 IN 9 RI1 IN 10 DCD2 IN RS422_TX RS485_D 11 RX2 IN RS422_TX RS485_D 12 TX2 OUT RS422_RX 13 DTR2 OUT RS422_RX 14 GND GND 15 DSR2 IN 16 RTS2 OUT 17 CTS2 IN 18 RI2 IN ...

Page 48: ...ER 8332AI 2 4 18 COM Port 1 Wafer Box Optional CN30 Pin Pin Name Signal Type RS 422 RS 485 1 DCD1 IN RS422_TX RS485_D 2 DSR1 IN 3 RX1 IN RS422_TX RS485_D 4 RTS1 OUT 5 TX1 OUT RS422_RX 6 CTS1 IN 7 DTR1 OUT RS422_RX 8 RI1 IN 9 GND GND DCD DSR RX RTS TX CTS DTR RI GND ...

Page 49: ...ER 8332AI 2 4 19 COM Port 2 Wafer Box Optional CN31 Pin Pin Name Signal Type RS 422 RS 485 1 DCD2 IN RS422_TX RS485_D 2 DSR2 IN 3 RX2 IN RS422_TX RS485_D 4 RTS2 OUT 5 TX2 OUT RS422_RX 6 CTS2 IN 7 DTR2 OUT RS422_RX 8 RI2 IN 9 GND GND DCD DSR RX RTS TX CTS DTR RI GND ...

Page 50: ... Pin Name Signal Type RS 422 RS 485 1 DCD3 IN RS422_TX RS485_D 2 RX3 IN RS422_TX RS485_D 3 TX3 OUT RS422_RX 4 DTR3 OUT RS422_RX 5 GND GND 6 DSR3 IN 7 RTS3 OUT 8 CTS3 IN 9 RI3 IN 10 DCD4 IN RS422_TX RS485_D 11 RX4 IN RS422_TX RS485_D 12 TX4 OUT RS422_RX 13 DTR4 OUT RS422_RX 14 GND GND 15 DSR4 IN 16 RTS4 OUT 17 CTS4 IN 18 RI4 IN ...

Page 51: ...ER 8332AI 2 4 21 COM Port 3 Wafer Box Optional CN33 Pin Pin Name Signal Type RS 422 RS 485 1 DCD3 IN RS422_TX RS485_D 2 DSR3 IN 3 RX3 IN RS422_TX RS485_D 4 RTS3 OUT 5 TX3 OUT RS422_RX 6 CTS3 IN 7 DTR3 OUT RS422_RX 8 RI3 IN 9 GND GND DCD DSR RX RTS TX CTS DTR RI GND ...

Page 52: ...ER 8332AI 2 4 22 COM Port 4 Wafer Box Optional CN34 Pin Pin Name Signal Type RS 422 RS 485 1 DCD4 IN RS422_TX RS485_D 2 DSR4 IN 3 RX4 IN RS422_TX RS485_D 4 RTS4 OUT 5 TX4 OUT RS422_RX 6 CTS4 IN 7 DTR4 OUT RS422_RX 8 RI4 IN 9 GND GND DCD DSR RX RTS TX CTS DTR RI GND ...

Page 53: ...ER 8332AI 2 4 23 COM Port 5 Wafer Box Optional CN35 Pin Pin Name Signal Type RS 422 RS 485 1 DCD5 IN RS422_TX RS485_D 2 DSR5 IN 3 RX5 IN RS422_TX RS485_D 4 RTS5 OUT 5 TX5 OUT RS422_RX 6 CTS5 IN 7 DTR5 OUT RS422_RX 8 RI5 IN 9 GND GND DCD DSR RX RTS TX CTS DTR RI GND ...

Page 54: ...R 8332AI 2 4 24 COM Port 6 Wafer Box Optional CN36 Pin Pin Name Signal Type RS 422 RS 485 1 DCD6 IN RS422_TX RS485_D 2 DSR6 IN 3 RX6 IN RS422_TX RS485_D 4 RTS16 OUT 5 TX6 OUT RS422_RX 6 CTS6 IN 7 DTR6 OUT RS422_RX 8 RI6 IN 9 GND GND DCD DSR RX RTS TX CTS DTR RI GND ...

Page 55: ...N37 Pin Pin Name Signal Type Signal Level 1 PCIE_WAKE IN 2 3 3V PWR 3 3V 3 NC 4 GND GND 5 NC 6 1 5V PWR 1 5V 7 PCIE_CLK_REQ IN 8 UIM_PWR PWR 9 GND GND 10 UIM_DATA I O 11 PCIE_REF_CLK DIFF 12 UIM_CLK IN 13 PCIE_REF_CLK DIFF 14 UIM_RESET IN 15 GND GND 16 UIM_VPP PWR 17 NC 18 GND GND 19 NC 20 W_DISABLE OUT 3 3V ...

Page 56: ... OUT 3 3V 23 PCIE_RX DIFF 24 3 3VSB PWR 3 3V 25 PCIE_RX DIFF 26 GND GND 27 GND GND 28 1 5V PWR 1 5V 29 GND GND 30 SMB_CLK I O 3 3V 31 PCIE_TX DIFF 32 SMB_DATA I O 3 3V 33 PCIE_TX DIFF 34 GND GND 35 GND GND 36 USB_D DIFF 37 GND GND 38 USB_D DIFF 39 3 3VSB PWR 3 3V 40 GND GND 41 3 3VSB PWR 3 3V 42 NC 43 GND GND 44 NC 45 NC 46 NC 47 NC ...

Page 57: ...System BOXER 8332AI Pin Pin Name Signal Type Signal Level 48 1 5V PWR 1 5V 49 NC 50 GND GND 51 NC 52 3 3VSB PWR 3 3V 2 4 26 SIM Slot CN38 Pin Pin Name Signal Type Signal Level 1 UIM_PWR PWR 2 UIM_RST IN 3 UIM_CLK IN 4 GND GND 5 UIM_VPP PWR 6 UIM_DATA I O ...

Page 58: ...t Half Sized CN39 Pin Pin Name Signal Type Signal Level 1 PCIE_WAKE IN 2 3 3V PWR 3 3V 3 NC 4 GND GND 5 NC 6 1 5V PWR 1 5V 7 PCIE_CLK_REQ IN 8 NC PWR 9 GND GND 10 NC I O 11 PCIE_REF_CLK DIFF 12 NC IN 13 PCIE_REF_CLK DIFF 14 NC IN 15 GND GND 16 NC PWR 17 NC 18 GND GND 19 NC 20 W_DISABLE OUT 3 3V ...

Page 59: ...X DIFF 24 3 3VSB PWR 3 3V 25 PCIE_RX SATA_RX DIFF 26 GND GND 27 GND GND 28 1 5V PWR 1 5V 29 GND GND 30 SMB_CLK I O 3 3V 31 PCIE_TX SATA_TX DIFF 32 SMB_DATA I O 3 3V 33 PCIE_TX SATA_TX DIFF 34 GND GND 35 GND GND 36 USB_D DIFF 37 GND GND 38 USB_D DIFF 39 3 3VSB PWR 3 3V 40 GND GND 41 3 3VSB PWR 3 3V 42 NC 43 GND GND 44 NC 45 MINICARD_SATA_PCIE_DET IN 46 NC 47 NC ...

Page 60: ... Pin Pin Name Signal Type Signal Level 48 1 5V PWR 1 5V 49 NC 50 GND GND 51 NC 52 3 3VSB PWR 3 3V 2 4 28 USB2 0 Wafer Box CN40 CN41 CN42 CN43 Note USB2 0 Wafer Box 5P Pitch 1 25mm Pin Pin Name Signal Type Signal Level 1 5V GND 5V 2 USBD DIFF 3 USBD DIFF 4 GND GND 5 GND GND ...

Page 61: ...ardware Information 47 Embedded AI Vision System BOXER 8332AI 2 4 29 Audio Jack Connector CN44 Pin Pin Name Signal Type Signal Level 11 MIC_R 21 LOUT_R 1Q HP_DET2 5 GND GND 2P HP_DET3 1P HP_DET1 24 LOUT_L 14 MIC_L ...

Page 62: ...nformation 48 Embedded AI Vision System BOXER 8332AI 2 4 30 Audio Connector Wafer Box Pin Pin Name Signal Type Signal Level 1 MIC_L 2 MIC_R 3 GND GND 4 LIN_L 5 LIN_R 6 GND GND 7 LOUT_L 8 LOUT_R 9 GND GND 10 VDD_AUD PWR 5V ...

Page 63: ...332AI 2 4 31 DC IN Connector CN48 Pin Pin Name Signal Type Signal Level 1 GND GND 2 GND GND 3 GND GND 4 GND GND 5 VIN PWR 6 VIN PWR 7 VIN PWR 8 VIN PWR 2 4 32 GPU DC IN Connector CN50 CN51 Pin Pin Name Signal Type Signal Level 1 12V PWR 12V 2 12V PWR 12V 3 12V PWR 12V ...

Page 64: ... Embedded AI Vision System BOXER 8332AI Pin Pin Name Signal Type Signal Level 4 12V PWR 12V 5 GND GND 6 GND GND 7 GND GND 8 GND GND 2 4 33 RTC Battery Connector BAT1 Pin Pin Name Signal Type Signal Level 1 3 3VA_RTC PWR 3 3V 2 GND GND ...

Page 65: ...ve 8th Generation Intel Core Xeon Celeron or Pentium CPU ready See Chapter 1 for processor compatibility Step 3 Remove the top cover by unscrewing the four retention screws You will see the CPU socket as in Figure 1 Step 4 Install the CPU Ensure you have also placed the thermal pad s as shown in figure 2 Step 5 Replace the top cover and secure with the four screws removed in Step 3 ...

Page 66: ...to install ready with the rear bracket attached Step 3 Remove the bottom panel from the system Note there are ten 10 retaining screws Set the screws in a safe place while working on the system Remove the two side cover screws see figure 2 Step 4 Insert the PCI Express card into the PCI Express slot pressing in until secure Secure the rear bracket with two screws see figure 1 Step 5 Attachthe two s...

Page 67: ... in place with the sliding bracket as follows A Turnthe securing screws counter clockwise to Open B Pushthe middle of the securing bracket down towards the expansion card Note the bracket should fit securely but not apply pressure onto the card C Lock the securing screws by turning them clockwise ...

Page 68: ... 2 Hardware Information 54 Embedded AI Vision System BOXER 8332AI Step 7 Reattachthe bottom panel with the ten screws removed in Step 3 as shown in figure 3 Step 8 Attachmounting brackets as shown in figure 4 ...

Page 69: ...Embedded AI Vision System BOXER 8332AI Chapter 3 Chapter 3 AMI BIOS Setup ...

Page 70: ...ion verification routines check the current system configuration against the values stored in the CMOS memory If they do not match an error message will be output and the BIOS setup program will need to be run to set the configuration information in memory There are three situations in which the CMOS settings will need to be set or changed Starting the system for the first time The system hardware...

Page 71: ...he power is turned off To enter BIOS Setup press Del or F2 immediately while your computer is powering up The function for each interface can be found below Main Date and time can be set here Press Tab to switch between date elements Advanced Access advanced hardware settings and options Chipset Chipset settings and options Security Set admin and user passwords access Secure Boot options Boot Boot...

Page 72: ...Chapter 3 AMI BIOS Setup 58 Embedded AI Vision System BOXER 8332AI 3 3 Setup Submenu Main ...

Page 73: ...Chapter 3 AMI BIOS Setup 59 Embedded AI Vision System BOXER 8332AI 3 4 Setup Submenu Advanced ...

Page 74: ...terface will not be available SHA 1 PCR Bank Enabled Optimal Default Failsafe Default Disabled Enable or Disable SHA 1 PCR Bank SHA256 PCR Bank Enabled Optimal Default Failsafe Default Disabled Enable or Disable SHA256 PCR Bank Pending operation None Optimal Default Failsafe Default TPM Clear Schedule an Operation for the Security Device NOTE Y our Computer will reboot during restart in order to c...

Page 75: ..._2 Optimal Default Failsafe Default TCG_1_2 Select the TCG2 Spec Version Support TCG_1_2 Compatible mode for Win8 Win10 TCG_2 Support new TCG2 protocoland event format for Win10 or later Physical Presence Spec Version 1 3 Optimal Default Failsafe Default 1 2 Select to Tell O S to support PPI Spec Version 1 2 or 1 3 Note some HCK tests might not support 1 3 Device Select Auto Optimal Default Failsa...

Page 76: ...rpool Technology Active Processor Cores 1 2 3 All Optimal Default Failsafe Default Number of cores to enable in each processor package Intel R SpeedStep tm Disabled Enabled Optimal Default Failsafe Default Allows more than two frequency ranges to be supported Intel R Speed Shift Technology Disabled Optimal Default Failsafe Default Enabled Enable Disable Intel R Speed Shift Technology support Enabl...

Page 77: ...ed Enabled Optimal Default Failsafe Default Enable Disable Processor Turbo Mode requires Intel Speed Step or Intel Speed Shift to be available or enabled C states Disabled Optimal Default Failsafe Default Enabled Enable Disable CPU Power Management Allows CPU to go C states when it s not 100 utilized ...

Page 78: ...al Default Failsafe Default Disabled When Disabled ME will be put into ME Temporarily Disabled Mode AMT BIOS Feature Enabled Optimal Default Failsafe Default Disabled When disabled AMT BIOS Features are no longer supported and user is no longer able to access MEBx Setup Note This option does not disable Manageability Features in FW ...

Page 79: ...S Setup 65 Embedded AI Vision System BOXER 8332AI 3 4 3 1 Firmware Update Configuration Options Summary ME FW Image Re Flash Enabled Disabled Optimal Default Failsafe Default Enable Disable ME FW Image Re Flash function ...

Page 80: ...32AI 3 4 3 2 PTT Configuration Options Summary ME FW Image Re Flash dTPM PTT Optimal Default Failsafe Default Selects TPM device PTT or dTPM PTT Enables PTT in SkuMgr dTPM 1 2 Disables PTT in SkuMgr Warning PTT dTPM will be disabled and all saved data will be lost ...

Page 81: ...ith Intel Optane System Acceleration Determines how SATA controller s operate Aggressive LPM Support Enabled Disabled Optimal Default Failsafe Default Enable PCH to aggressively enter link power state M 2 mSATA Port Enabled Optimal Default Failsafe Default Disabled Enable or Disable SATA Port Serial Port 1 2 3 4 Enabled Optimal Default Failsafe Default Disabled Enable or Disable SATA Port ...

Page 82: ...HCI Hand off Enabled Optimal Default Failsafe Default Disabled This is a workaround for OSes without XHCI Hand off support The XHCI ownership change should be claimed by XHCI driver USB Mass Storage Driver Support Enabled Optimal Default Failsafe Default Disabled Enable Disable USB Mass Storage Driver Support ...

Page 83: ...Chapter 3 AMI BIOS Setup 69 Embedded AI Vision System BOXER 8332AI 3 4 6 Hardware Monitor Options Summary Smart Fan Enabled Optimal Default Failsafe Default Disabled Enable or Disable Smart Fan ...

Page 84: ...Output PWM mode push pull to control 4 wire fans Linear fan application circuit to control 3 wire fan speed by fan s power terminal Output PWM mode open drain to control Intel 4 wire fans Fan 1 Smart Fan Control Manual RPM Mode Manual Duty Mode Auto RPM Mode Auto Duty Cycle Mode Optimal Default Failsafe Default Smart Fan Mode Select Temperature Source CPU System Optimal Default Failsafe Default Se...

Page 85: ...ycle 1 100 Fan 2 Smart Fan Control Manual RPM Mode Manual Duty Mode Auto RPM Mode Auto Duty Cycle Mode Optimal Default Failsafe Default Smart Fan Mode Select Temperature Source CPU System Optimal Default Failsafe Default Select the monitored temperature source for this fan Temperature 1 2 3 4 1 100 Range 60 50 40 30 Optimal Default Failsafe Default Auto fan speed control Fan speed will follow diff...

Page 86: ...Chapter 3 AMI BIOS Setup 72 Embedded AI Vision System BOXER 8332AI 3 4 7 SIO Configuration ...

Page 87: ...Disabled Enabled or Disabled this Logical Device Device resource settings USB AutomaticSetting Optimal Default Failsafe Default IO 3F8h IRQ 4 IO 2F8h IRQ 3 Allows the user to change the device resource settings New settings will be reflected on this setup page after system restarts UART selection RS232 Optimal Default Failsafe Default RS422 RS485 UART RS232 422 485 selection ...

Page 88: ...Disabled Enabled or Disabled this Logical Device Device resource settings USB AutomaticSetting Optimal Default Failsafe Default IO 2F8h IRQ 3 IO 3F8h IRQ 4 Allows the user to change the device resource settings New settings will be reflected on this setup page after system restarts UART selection RS232 Optimal Default Failsafe Default RS422 RS485 UART RS232 422 485 selection ...

Page 89: ...isabled Enabled or Disabled this Logical Device Device resource settings USB AutomaticSetting Optimal Default Failsafe Default IO 3E8h IRQ 11 IO 2E8h IRQ 11 Allows the user to change the device resource settings New settings will be reflected on this setup page after system restarts UART selection RS232 Optimal Default Failsafe Default RS422 RS485 UART RS232 422 485 selection ...

Page 90: ...isabled Enabled or Disabled this Logical Device Device resource settings USB AutomaticSetting Optimal Default Failsafe Default IO 2E8h IRQ 11 IO 3E8h IRQ 11 Allows the user to change the device resource settings New settings will be reflected on this setup page after system restarts UART selection RS232 Optimal Default Failsafe Default RS422 RS485 UART RS232 422 485 selection ...

Page 91: ... Setup 77 Embedded AI Vision System BOXER 8332AI 3 4 8 Network Stack Configuration Network Stack Disabled Options Summary Network Stack Disabled Enabled Optimal Default Failsafe Default Enable Disable UEFI Network Stack ...

Page 92: ...ed IPv4 PXE boot support will not be available Ipv4 HTTP Support Disabled Optimal Default Failsafe Default Enabled Enable Disable IPv4 HTTP boot support Ifdisabled IPv4 HTTP boot support will not be available PXE boot wait time 0 Optimal Default Failsafe Default Wait time in seconds to press ESC key to abort the PXE boot Use either or numeric keys to set the value Media detect count 1 Optimal Defa...

Page 93: ... System BOXER 8332AI 3 4 9 Digital IO Port Configuration Options Summary DIO Type Output Optimal Default Failsafe Default Input Set DIO as Input or Output DIO Data Low High Optimal Default Failsafe Default Set is output level when DIO pin is output ...

Page 94: ...fe Default Power On Power Off Select power state when power is re applied after a power failure RTC wake system from S5 Disabled Optimal Default Failsafe Default Enabled Fixed Time System will make on the hr min secspecified Dynamic Time System will wake on the current time Increase minute S RTC wake system from S5 Enabled Wake up day 0 Select 0 for daily system wake up 1 31 for which day of the m...

Page 95: ...Chapter 3 AMI BIOS Setup 81 Embedded AI Vision System BOXER 8332AI Options Summary Wake up hour 0 Select 0 23 For example enter 3 for 3am and 15 for 3pm Wake up minute 0 0 59 Wake up second 0 0 59 ...

Page 96: ...Chapter 3 AMI BIOS Setup 82 Embedded AI Vision System BOXER 8332AI 3 5 Setup Submenu Chipset ...

Page 97: ...I Graphics device should be Primary Display Or select SG for Switchable Gfx SA GV Enabled Optimal Default Failsafe Default Disabled Fixed Low Fixed High System Agent Geyserville Fixed Low Mid High SA GV disabled MRC only runs tasks from Low Mid or High point SA GV will be disabled on DT Halo CPUs regardless of this setting PM Support Enabled Optimal Default Failsafe Default Disabled Enable Disable...

Page 98: ...support DVMT Total Gfx Mem 128M 256M MAX Optimal Default Failsafe Default Select DVMT5 0 Total Graphic Memory sized used by the Internal Graphics Device VT d Enabled Disabled Optimal Default Failsafe Default VT d capability Skip Scaning of External Gfx Card Enabled Disabled Optimal Default Failsafe Default If Enabled it will not scan for External Gfx Card on PEG and PCH PCIE Ports ...

Page 99: ...3 AMI BIOS Setup 85 Embedded AI Vision System BOXER 8332AI 3 5 2 PEG Port Configuration Options Summary Max Link Speed Auto Optimal Default Failsafe Default Gen 1 Gen 2 Gen 3 Configure PEG 0 1 0 0 1 1 Max Speed ...

Page 100: ...ault Disabled Control the Detection of the Audio device Disabled HDA will be unconditionally disabled Enabled HDA will be unconditionally enabled PCI Express x4 Slot x4 PCIe Speed Auto Optimal Default Failsafe Default Gen 1 Gen 2 Gen 3 Configure PCIe Speed Mini Card 1 2 Slot PCIe Speed Auto Optimal Default Failsafe Default Gen 1 Gen 2 Configure PCIe Speed ...

Page 101: ...or when the user enters the Setup utility A User Password does not provide access to many of the features in the Setup utility Select the password you wish to set and press Enter In the dialog box enter your password must be between 3 and 20 letters or numbers Press Enter and retype your password to confirm Press Enter again to set the password Removing the Password Select the password you want to...

Page 102: ...de The mode change requires platform reset Secure Boot Mode Standard Custom Optimal Default Failsafe Default Secure Boot Mode options Standard or Custom In Custom mode Secure Boot Policy variables can be configured by a physically present user without full authentication Restore Factory Keys Y es No Force System to User Mode Install factory default Secure Boot key databases Key Management Enables ...

Page 103: ... es to install factory default keys Y es Force System to User Mode Install Factory default Secure Boot key databases Export Secure Boot variables Acpi a0341d0 0 PCI 12 0 DevicePath Type 3 SubType 18 HD Part2 Sig Copy NVRAM content of Secure Boot variables to files in a root folder on a file system device Enroll Efi Image Acpi a0341d0 0 PCI 12 0 DevicePath Type 3 SubType 18 HD Part2 Sig Allow the i...

Page 104: ... Key Details Enroll Factory Defaults or load certificates from a file 1 Public key Certificate a EFI_SIGNATURE_LIST b EFI_CERT_X509 DER c EFI_CERT_RSA2048 bin d EFI_CERT_SHAXXX 2 Authenticated UEFI Variable 3 EFI PE COFF Image SHA256 Key Source Factory External Mixed Export Update Append Delete Authorized Signatures 4296 3 No Key Details Enroll Factory Defaults or load certificates from a file 1 P...

Page 105: ...te Append Delete Authorized TimeStamps 0 0 No Key Update Enroll Factory Defaults or load certificates from a file 1 Public key Certificate a EFI_SIGNATURE_LIST b EFI_CERT_X509 DER c EFI_CERT_RSA2048 bin d EFI_CERT_SHAXXX 2 Authenticated UEFI Variable 3 EFI PE COFF Image SHA256 Key Source Factory External Mixed Append OsRecovery Signatures 0 0 No Key Update Enroll Factory Defaults or load certifica...

Page 106: ...hapter 3 AMI BIOS Setup 92 Embedded AI Vision System BOXER 8332AI 3 7 Setup Submenu Boot Options Summary Quiet Boot Disabled Enabled Optimal Default Failsafe Default Enables or disables Quiet Boot option ...

Page 107: ...Chapter 3 AMI BIOS Setup 93 Embedded AI Vision System BOXER 8332AI 3 8 Setup Submenu Save Exit ...

Page 108: ...Embedded AI Vision System BOXER 8332AI Chapter 4 Chapter 4 Drivers Installation ...

Page 109: ...steps below to install them Install Chipset Drivers 1 Unzip the Chipset driver zip file 2 Run the SetupChipset exe file in the folder 3 Follow the instructions 4 Drivers will be installed automatically Install Graphics Drivers 1 Unzip the Graphics driver zip file 2 Run the igxpin exe file in the folder 3 Follow the instructions 4 Drivers will be installed automatically Install ME Drivers 1 Unzip t...

Page 110: ... the 0008 64bit_Win7_Win8_Win81_Win10_R281 exe file in the folder 3 Follow the instructions 4 Drivers will be installed automatically Install Intel RST Drivers 1 Unzip the Intel RST driver zip file 2 Run the SetupRST exe file in the folder 3 Follow the instructions 4 Drivers will be installed automatically Install Serial Port Drivers Optional 1 Unzip the Serial Port Driver zip file 2 Run the Finte...

Page 111: ...Embedded AI Vision System BOXER 8332AI Appendix A Appendix A Watchdog Timer Programming ...

Page 112: ...rogram setting for the Watchdog Timer program If you have any questions or need support please contact an AAEON representative by visiting the support page at AAEON com Please refer to the Linux Driver User Guide to access DIO Watchdog Timer and Hardware Manager The User Guide is available to download from the Drivers section of the product page ...

Page 113: ...alue Note Timer Counter 0x07 Note3 0xF6 Note4 Note24 Time of watchdog timer 0 255 This register is byte access Counting Unit 0x07 Note5 0xF5 Note6 3 Note7 0 Note8 Select time unit 0 second 1 minute Watchdog Enable 0x07 Note9 0xF5 Note10 5 Note11 1 Note12 0 Disable 1 Enable Timeout Status 0x07 Note13 0xF5 Note14 6 Note15 1 1 Clear timeout status Output Mode 0x07 Note16 0xF5 Note17 4 Note18 1 Note19...

Page 114: ...parameter is representedfrom Note8 define byte EnableLDN This parameter is represented from Note9 define byte EnableReg This parameter is represented from Note10 define byte EnableBit This parameter is represented from Note11 define byte EnableVal This parameter is representedfromNote12 define byte StatusLDN This parameter is represented from Note13 define byte StatusReg This parameter is represen...

Page 115: ...ed AI Vision System BOXER 8332AI VOID Main Procedure AaeonWDTConfig byte Timer Time of WDTtimer 0x00 0xFF boolean Unit Select timeunit 0 second 1 minute AaeonWDTConfig Procedure AaeonWDTEnable This procudure will enable the WDTcounting AaeonWDTEnable ...

Page 116: ...DT relative parameter setting WDTParameterSetting VOID WDTEnableDisable byte LDN byte Register byte BitNum byte Value SIOBitSet LDN Register BitNum Value VOID WDTParameterSetting Watchdog Timercountersetting SIOByteSet TimerLDN TimerReg TimerVal WDT counting unit setting SIOBitSet UnitLDN UnitReg UnitBit UnitVal WDT output modesetting level pulse SIOBitSet ModeLDN ModeReg ModeBit ModeVal Watchdog ...

Page 117: ...DN Register Offset 0x07 IOWriteByte SIOData LDN VOID SIOBitSet byte LDN byte Register byte BitNum byte Value Byte TmpValue SIOEnterMBPnPMode SIOSelectLDN byte LDN IOWriteByte SIOIndex Register TmpValue IOReadByte SIOData TmpValue 1 BitNum TmpValue Value BitNum IOWriteByte SIOData TmpValue SIOExitMBPnPMode VOID SIOByteSet byte LDN byte Register byte Value SIOEnterMBPnPMode SIOSelectLDN LDN IOWriteB...

Page 118: ...Embedded AI Vision System BOXER 8332AI Appendix B Appendix B I O Information ...

Page 119: ...Appendix B I O Information 105 Embedded AI Vision System BOXER 8332AI B 1 I O Address Map ...

Page 120: ...Appendix B I O Information 106 Embedded AI Vision System BOXER 8332AI ...

Page 121: ...Appendix B I O Information 107 Embedded AI Vision System BOXER 8332AI B 2 IRQ Mapping Chart ...

Page 122: ...Appendix B I O Information 108 Embedded AI Vision System BOXER 8332AI ...

Page 123: ...Appendix B I O Information 109 Embedded AI Vision System BOXER 8332AI ...

Page 124: ...Appendix B I O Information 110 Embedded AI Vision System BOXER 8332AI ...

Page 125: ...Appendix B I O Information 111 Embedded AI Vision System BOXER 8332AI ...

Page 126: ...Appendix B I O Information 112 Embedded AI Vision System BOXER 8332AI ...

Page 127: ...Appendix B I O Information 113 Embedded AI Vision System BOXER 8332AI ...

Page 128: ...Appendix B I O Information 114 Embedded AI Vision System BOXER 8332AI ...

Page 129: ...Appendix B I O Information 115 Embedded AI Vision System BOXER 8332AI ...

Page 130: ...Appendix B I O Information 116 Embedded AI Vision System BOXER 8332AI ...

Page 131: ...Appendix B I O Information 117 Embedded AI Vision System BOXER 8332AI B 3 Memory Address Map ...

Page 132: ...Embedded AI Vision System BOXER 8332AI Appendix C Appendix C Digital I O Ports ...

Page 133: ...ram the Digital I O ports for your system DIO Please refer to the Linux Driver User Guide to access DIO Watchdog Timer and Hardware Manager The User Guide is available to download from the Drivers section of the product page C 2 Electrical Specifications for Digital I O Ports GPIO70 DIO_0 GPIO71 DIO_1 GPIO72 DIO_2 GPIO73 DIO_3 GPIO74 DIO_4 GPIO75 DIO_5 GPIO76 DIO_6 GPIO77 DIO_7 ...

Page 134: ...ipset as its Digital I O controller The following sections detail the procedures to complete its configuration There are three steps to complete the configuration setup Step 1 Enter MB PnP Mode Step 2 Modify the data in the configuration registers Step 3 Exit MB PnP Mode Undesired results may occur if MB PnP Mode is not exited properly ...

Page 135: ... Note15 0x82 Note16 4 Note17 GPIO74 DIO 6 Pin Status 0x06 Note18 0x82 Note19 5 Note20 GPIO75 DIO 7 Pin Status 0x06 Note21 0x82 Note22 6 Note23 GPIO76 DIO 8 Pin Status 0x06 Note24 0x82 Note25 7 Note26 GPIO77 Table 3 Digital Output relative register table LDN Register BitNum Value Note DIO 1 Output Data 0x06 Note27 0x81 Note28 0 Note29 Note30 GPIO70 DIO 2 Output Data 0x06 Note31 081 Note32 1 Note33 ...

Page 136: ...yte DInput3Reg This parameter is represented from Note10 define byte DInput3Bit This parameter is represented from Note11 define byte DInput4LDN This parameter is represented from Note12 define byte DInput4Reg This parameter is represented from Note13 define byte DInput4Bit This parameter is represented from Note14 define byte DInput5LDN This parameter is represented from Note15 define byte DInput...

Page 137: ...g This parameter is represented from Note40 define byte DOutput4Bit This parameter is represented from Note41 define byte DOutput4Val This parameter is represented from Note42 define byte DOutput5LDN This parameter is represented from Note43 define byte DOutput5Reg This parameter is represented from Note44 define byte DOutput5Bit This parameter is represented from Note45 define byte DOutput5Val Th...

Page 138: ...atus Input Example Read Digital I O Pin 3 status Output InputStatus 0 Digital I O Pin level is low 1 Digital I O Pin level is High PinStatus AaeonReadPinStatus DInput3LDN DInput3Reg DInput3Bit Procedure AaeonSetOutputLevel Input Example Set Digital I O Pin 6 level AaeonSetOutputLevel DOutput6LDN DOutput6Reg DOutput6Bit DOutput6Val ...

Page 139: ...olean AaeonReadPinStatus byte LDN byte Register byte BitNum Boolean PinStatus PinStatus SIOBitRead LDN Register BitNum Return PinStatus VOID AaeonSetOutputLevel byte LDN byte Register byte BitNum byte Value ConfigToOutputMode LDN Register BitNum SIOBitSet LDN Register BitNum Value ...

Page 140: ... Register Offset 0x07 IOWriteByte SIOData LDN VOID SIOBitSet byte LDN byte Register byte BitNum byte Value Byte TmpValue SIOEnterMBPnPMode SIOSelectLDN byte LDN IOWriteByte SIOIndex Register TmpValue IOReadByte SIOData TmpValue 1 BitNum TmpValue Value BitNum IOWriteByte SIOData TmpValue SIOExitMBPnPMode VOID SIOByteSet byte LDN byte Register byte Value SIOEnterMBPnPMode SIOSelectLDN LDN IOWriteByt...

Page 141: ...OIndex Register TmpValue IOReadByte SIOData TmpValue 1 BitNum SIOExitMBPnPMode If TmpValue 0 Return 0 Return 1 VOID ConfigToOutputMode byte LDN byte Register byte BitNum Byte TmpValue OutputEnableReg OutputEnableReg Register 1 SIOEnterMBPnPMode SIOSelectLDN LDN IOWriteByte SIOIndex OutputEnableReg TmpValue IOReadByte SIOData TmpValue 1 BitNum IOWriteByte SIOData OutputEnableReg SIOExitMBPnPMode ...

Page 142: ...Embedded AI Vision System BOXER 8332AI Appendix D Appendix D Glue Removal Procedure ...

Page 143: ... perform maintenance This section details the steps needed to remove the glue Before performing any kind of system maintenance ensure the system is shut down not in sleep or hibernate mode and the power cable has been removed Follow steps in Chapter 2 to access the components inside Y ou will need the following items for this step Cotton or cottonswab Anti static tweezers An alcohol solution that ...

Page 144: ...opper or bottle as shown above apply a few drops of alcohol to the glue Step 2 Allow the alcohol to soak for 10 seconds then use a cottonswab or cotton with anti static tweezers to evenly rub the alcohol over the glue Step 3 Let soakfor 10 more seconds then use anti static tweezers to remove the glue ...

Page 145: ...Appendix C Digital I O Information 131 Embedded AI Vision System BOXER 8332AI If you encounter any issues or need support please contact your AAEON representative or visit our Support Page at AAEON com ...

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