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CONNECTOR PINOUTS 

7-4 

OmniBus II NI PXIe User Manual 

7.3.2  ARINC 429 

Table 7.3 lists the pin assignments for OB2 ARINC 429 modules.  

 

Note: The 441 and 442 models have a transmit and receive channel on each pin 

pair. You can control the receive channel via the API channel number listed in the 
Channel  column.  You can control the transmit channel  via the receiver’s API 
c 16. For example, the receive channel zero shares pins with the transmit 
channel 16.

 

442 

16R/T

 

458 

8R/8T

 

441 

8R/T

  Channel 

Name 

Polarity 

LFH 

Pair # 

LFH  

Pin 

16036 

Pin 

LFH 

Name 

R/T 

R 

R/T 

CH0

ϯ

/ 

CH16 

ϯ ϯ

 

CH0P 

+ 

1 

3 

P2-3 

BUS0P 

CH0N 

– 

1 

2 

P2-15 

BUS0N 

R/T 

R 

R/T 

CH1

 

ϯ

 / 

CH17

 

ϯ ϯ

 

CH1P 

+ 

14 

28 

P2-2 

BUS1P 

CH1N 

– 

14 

29 

P2-14 

BUS1N 

R/T 

R 

R/T 

CH2

 

ϯ

 / 

CH18

 

ϯ ϯ

 

CH2P 

+ 

2 

5 

P2-4 

BUS2P 

CH2N 

– 

2 

4 

P2-16 

BUS2N 

R/T 

R 

R/T 

CH3

 

ϯ

 /

 

ϯ ϯ

 

CH19

 

ϯ ϯ

 

CH3P 

+ 

13 

26 

P2-5 

BUS3P 

CH3N 

– 

13 

27 

P2-17 

BUS3N 

R/T 

R 

R/T 

CH4

 

ϯ

 /

 

ϯ ϯ

 

CH20

 

ϯ ϯ

 

CH4P 

+ 

3 

7 

P2-6 

BUS4P 

CH4N 

– 

3 

6 

P2-18 

BUS4N 

R/T 

R 

R/T 

CH5

 

ϯ

 / 

CH21

 

ϯ ϯ

 

CH5P 

+ 

12 

24 

P2-8 

BUS5P 

CH5N 

– 

12 

25 

P2-19 

BUS5N 

R/T 

R 

R/T 

CH6/ 

CH22

 

ϯ ϯ

 

CH6P 

+ 

4 

9 

P2-9 

BUS6P 

CH6N 

– 

4 

8 

P2-20 

BUS6N 

R/T 

R 

R/T 

CH7

 

ϯ

 / 

CH23

 

ϯ ϯ

 

CH7P 

+ 

11 

22 

P2-10 

BUS7P 

CH7N 

– 

11 

23 

P2-21 

BUS7N 

R/T 

T 

n/a 

CH8

 

ϯ

 / 

CH24

 

ϯ ϯ

 

CH8P 

+ 

16 

33 

P3-3 

BUS8P 

CH8N 

– 

16 

32 

P3-15 

BUS8N 

R/T 

T 

CH9

 

ϯ

 / 

CH25

 

ϯ ϯ

 

CH9P 

+ 

29 

58 

P3-2 

BUS9P 

CH9N 

– 

29 

59 

P3-14 

BUS9N 

R/T 

T 

CH10

 

ϯ

 / 

CH26

 

ϯ ϯ

 

CH10P 

+ 

17 

35 

P3-4 

BUS10P 

CH10N 

– 

17 

34 

P3-16  BUS10N 

R/T 

T 

CH11

 

ϯ

 / 

CH27

 

ϯ ϯ

 

CH11P 

+ 

28 

56 

P3-5 

BUS11P 

CH11N 

– 

28 

57 

P3-17  BUS11N 

R/T 

T 

CH12

 

ϯ

 / 

CH28

 

ϯ ϯ

 

CH12P 

+ 

18 

37 

P3-6 

BUS12P 

CH12N 

– 

18 

36 

P3-18  BUS12N 

R/T 

T 

CH13

 

ϯ

 / 

CH29

 

ϯ ϯ

 

CH13P 

+ 

27 

54 

P3-8 

BUS13P 

CH13N 

– 

27 

55 

P3-19  BUS13N 

R/T 

T 

CH14

 

ϯ

 / 

CH30

 

ϯ ϯ

 

CH14P 

+ 

19 

39 

P3-9 

BUS14P 

CH14N 

– 

19 

38 

P3-20  BUS14N 

R/T 

T 

CH15

 

ϯ

 / 

CH31

 

ϯ ϯ

 

CH15P 

+ 

26 

52 

P3-10  BUS15P 

CH15N 

– 

26 

53 

P3-21  BUS15N 

 

Table 7.3—Pinouts for ARINC 429 modules 

Summary of Contents for OMNIBUS II NI PXIe

Page 1: ...uments LV 222 511 442 Manual Get Pricing Availability at ApexWaves com Call Today 1 800 915 6216 Email sales apexwaves com https www apexwaves com modular systems national instruments pxi avionics mul...

Page 2: ...stronics Ballard Technology www astronics com MA223 20180201 Rev C 1 OMNIBUS II NI PXIe USER MANUAL Interface Card To Avionics Databuses February 1 2018 Rev C 1 Copyright 2018 by Ballard Technology In...

Page 3: ......

Page 4: ...assuring suitability and proper use of Ballard products for their particular use or application INTERFERENCE This equipment generates uses and can radiate radio frequency energy and if not installed a...

Page 5: ...es with Part 15 of the FCC Rules Operation is subject to the following two conditions 1 This device may not cause harmful interference and 2 This device must accept any interference received including...

Page 6: ...2 3 3 OPERATION 3 1 3 1 CoPilot 3 1 3 2 User Developed Software 3 2 4 OMNIBUS II FEATURES 4 1 4 1 PCI Express Bus 4 1 4 1 1 PXIe Form Factor 4 1 4 2 Built in Test 4 1 4 2 1 Power on Built in Test PBIT...

Page 7: ...c Waveform 6 4 6 3 2 Configurable Frequency 6 5 6 3 3 Output State 6 5 6 4 Part Number Cross Reference 6 6 7 CONNECTOR PINOUTS 7 1 7 1 Interface Connector 7 1 7 2 General Pinout 7 2 7 3 Module Specifi...

Page 8: ...1 Figure 4 1 Built in Test and System Monitor Architecture 4 2 Figure 4 2 OmniBus II Discrete Shunt Input Circuit 4 9 Figure 4 3 OmniBus II Discrete Shunt Output Circuit 4 10 Figure 5 1 PXIe Onboard...

Page 9: ...3 Table 5 3 PXIe Trigger to Protocol Sync Mapping 5 3 Table 5 4 Transitional Protocol Trigger Parameters 5 4 Table 5 5 PXIe Status Parameters 5 4 Table 6 1 OmniBus II PXIe Host Part Numbering 6 1 Tab...

Page 10: ...communicate with avionics databuses for the purpose of testing simulation and or operation Each OB2 unit can support more than one protocol and a large number of channels They are available as an int...

Page 11: ...be synchronized in time to each other and to external devices OmniBus II is a newer enhanced generation of the original OmniBus architecture Though there are similarities the components of the two gen...

Page 12: ...rt number is produced in the factory by mounting protocol specific modules on the required host platform and loading module specific firmware on the FPGAs Note The OB2 is not user configurable You can...

Page 13: ...ucts support the most common protocols which are briefly described below MIL STD 1553 is the protocol for military aircraft and other military and commercial applications It is a digital command respo...

Page 14: ...information files and resources 1 5 Support and Service National Instruments provides support for these products They have the most familiarity and experience with the LabVIEW platform and will be ab...

Page 15: ...INTRODUCTION 1 6 OmniBus II NI PXIe User Manual This page intentionally blank...

Page 16: ...t do the following For a PXIe System Shut down the system On the card select the required clock by sliding the onboard switch left or right With the injector handle in the down position insert the car...

Page 17: ...d the Instrument Driver VI files will be compiled for the latest supported version of LabVIEW automatically If you encounter problems or have installation questions please reboot the controller prior...

Page 18: ...time to determine or reassign the card number If you need further assistance contact Customer Support see Section 1 5 2 4 Step 4 Connect to Databus s I O Connect the databuses to the PXIe card accordi...

Page 19: ...INSTALLATION 2 4 OmniBus II NI PXIe User Manual This page intentionally blank...

Page 20: ...data CoPilot is a Windows based program that features a user friendly GUI Graphical User Interface and many timesaving features For example you can automatically detect bus messages post them in the...

Page 21: ...alls and process messages to and from the avionics databus Functions include routines for transmitting receiving scheduling recording data manipulation and time tagging bus messages Although most task...

Page 22: ...er 5 4 2 Built in Test The OB2 family includes onboard circuitry to test card operation and provide health information to the user application Three types of built in testing are supported Power on In...

Page 23: ...ect the system if the temperature sensor measurements exceed built in system limits Figure 4 1 Built in Test and System Monitor Architecture 4 3 System Time Synchronization Systems with high reliabili...

Page 24: ...le 4 1 I O Combinations for System Synchronization The TSM logic is activated only in Core A of an OB2 family device and all TSM configuration API calls must be directed to Core A BTICARD_TSM function...

Page 25: ...me through a broadcast system time message and shared oscillator The default timer rollover is one year but is user adjustable to account for leap years BTICard_CardReset does not reset the core timer...

Page 26: ...n operate as a PCM master PCM slave AM master and AM slave There are a number of formats for IRIG timing The OB2 family supports the IRIG formats indicated in Table 4 3 The characteristics of the exte...

Page 27: ...he OB2 PPS circuit as either a master or a slave The bidirectional buffer drives the PPS only when you configure the PPS circuit as a master When you configure the PPS circuit as a slave it will expec...

Page 28: ...input relative the local clock oscillator and adjust the frequency of the local clock to follow the input 10 MHz signal 10 MHz Input Characteristics Min input impedance at 1 kHz 10 k Max input amplitu...

Page 29: ...er be used as a discrete output or input More than one core discrete each with an individually specified polarity may be used in combination to define a sync or trigger state For instance a trigger ma...

Page 30: ...put for the pin 4 5 1 Shunt Inputs A shunt input circuit pin is pulled up to a voltage source through a resistor A load resistance applied between the pin and ground will shunt current from the source...

Page 31: ...oviding self monitor capabilities Figure 4 3 OmniBus II Discrete Shunt Output Circuit 4 5 4 Shunt Output Considerations Limits The OB2 1553 discrete outputs are open ground switches capable of sinking...

Page 32: ...e output remains disabled until both the fault condition is cleared and the user drives the output again Thus it is important that the user corrects fault conditions before attempting to drive the out...

Page 33: ...cription LFH Pin LFH Pin Name API dionum ADIO0 Avionics DIO 0 7 BUS4P 17 ADIO1 Avionics DIO 1 6 BUS4N 18 ADIO2 Avionics DIO 2 24 BUS5P 19 ADIO3 Avionics DIO 3 25 BUS5N 20 ADIO4 Avionics DIO 4 9 BUS6P...

Page 34: ...h is not a jumper thus the switch cannot be removed from the card Refer to Section 5 4 for more information about reading the clock switch status Figure 5 1 PXIe Onboard Clock Switch If the card does...

Page 35: ...ed when tristating with this function Only one core can drive a particular bidirectional signal at a time If both cores are driving the same trigger the value most recently written will be driven on t...

Page 36: ...XIe Trigger to Protocol Trigger Mapping Protocol Sync PXIe Signal Sync Mask Parameter A PXI_TRIG 0 SYNCMASK_PXITRIGA B PXI_TRIG 1 SYNCMASK_PXITRIGB C PXI_TRIG 2 SYNCMASK_PXITRIGC PXI_STAR SYNCMASK_PXI...

Page 37: ...polarity for trigger line C TRIGPOL_TRIGCH Sets active high polarity for trigger line C TRIGPOL_TRIGCF Sets active on falling edge of trigger line C TRIGPOL_TRIGCR Sets active on rising edge of trigg...

Page 38: ...PXI Express Peripheral Slot or a PXI Express System Timing Slot These slot types will be marked on the system chassis with one of the three Glyphs from Figure 5 2 Note While the PXIe card will operate...

Page 39: ...OMNIBUS II PXIE SPECIFIC FEATURES 5 6 OmniBus II NI PXIe User Manual This page intentionally blank...

Page 40: ...e w 2 cores Table 6 1 OmniBus II PXIe Host Part Numbering 6 2 MIL STD 1553 Modules MIL STD 1553 modules can have one or two dual redundant databuses chan nels The part numbers for 1553 modules start w...

Page 41: ...6 2 2 Configurable RT Response Time The RT response time of MIL STD 1553 OB2 modules may be individually set in software for each 1553 channel You can measure the response from the mid bit zero cross...

Page 42: ...G1553_AMPLHI 0V 26V 101 dacval 4 PARAMCFG1553_AMPLLO 0V 4 9V 019 dacval 4 Table 6 5 MIL STD 1553 ParamAmplitudeConfig Output Drive Since the actual amplitude and linearity depend on both the line driv...

Page 43: ...oth receive and transmit channels may be independently set for low or high speed 12 5 or 100 Kbps and support varying the bit rate for non standard applications As shown in the Table 6 7 some ARINC 42...

Page 44: ...s either side of signal to be outside the 10 V to 10 V range Table 6 7 ARINC 429 Parametric Waveform Characteristics 6 3 2 Configurable Frequency You can operate parametric ARINC 429 modules at non st...

Page 45: ...n connectors for test interconnect NI Cable Part Number Ballard Cable Part Number Photo Description 784808 01 16036 LFH to 2 DB25 connectors Mostly used in ARINC 429 applications This cable brings all...

Page 46: ...ard P N NI P N Cable Core A Cable Core B LV 222 441 000 784802 01 784808 01 LV 222 442 000 784803 01 784808 01 LV 222 442 442 784804 01 784808 01 784808 01 LV 222 510 000 784796 01 784807 01 LV 222 51...

Page 47: ...MODULE CONFIGURATIONS 6 8 OmniBus II NI PXIe User Manual This page intentionally blank...

Page 48: ...nnector or a module not listed here please consult other documentation provided with the product or call Customer Support see Section 1 5 Ballard offers a number of special cable assemblies to facilit...

Page 49: ...GND 13 CDIO4 43 CDIO7 7 14 CGND 22 44 CGND 15 NC 5VA 45 NC 5VA 8 16 GND 23 46 GND 17 IRIG 47 IRIG 10MHZ 9 18 GND 24 48 GND 19 CDIO5 49 CDIO6 10 20 GND 25 50 GND 21 CDIO1 51 CDIO2 11 22 BUS7P 26 52 BU...

Page 50: ...oupled 2 4 P2 16 BUS2N CH0BX BUS B transformer coupled 13 26 P2 5 BUS3P CH0BXR BUS B transformer coupled 13 27 P2 17 BUS3N n a CH1 CH1AD BUS A direct coupled 29 58 P3 2 BUS9P CH1ADR BUS A direct coupl...

Page 51: ...BUS2P CH2N 2 4 P2 16 BUS2N R T R R T CH3 CH19 CH3P 13 26 P2 5 BUS3P CH3N 13 27 P2 17 BUS3N R T R R T CH4 CH20 CH4P 3 7 P2 6 BUS4P CH4N 3 6 P2 18 BUS4N R T R R T CH5 CH21 CH5P 12 24 P2 8 BUS5P CH5N 12...

Page 52: ...lf to the other D sub thus giving similar signals on the corresponding pins of both D subs The wire pairs on the 16036 are different from those on the 16035 Table 7 4 below shows the wiring for the 16...

Page 53: ...e four cables are available for single or dual channel modules and with or without a D sub connector All of them provide a twinax cable from the LFH connector to a PL 75 for each of the transformer co...

Page 54: ...annel MIL STD 1553 OB2modules Pair Name From LFH Pin To DB25S Pin 1 CDIO0 11 1 1 GND 10 14 2 CDIO1 21 2 2 GND 20 15 3 CDIO2 51 3 3 GND 50 16 4 CDIO3 41 4 4 GND 40 17 5 CDIO7 43 6 5 GND 42 19 6 CDIO4 1...

Page 55: ...CONNECTOR PINOUTS 7 8 OmniBus II NI PXIe User Manual This page intentionally blank...

Page 56: ...tabus A 2 Transformer versus Direct Coupling MIL STD 1553 can be either direct or transformer coupled Most military MIL STD 1553 systems are transformer coupled Both coupling methods have a transforme...

Page 57: ...COUPLING AND TERMINATION A 2 OmniBus II NI PXIe User Manual Figure A 1 Transformer Coupling to a Dual Redundant Databus...

Page 58: ...NI PXIe User Manual A 3 Figure A 2 Direct Connection to a Dual Redundant Databus Bus A Bus B 78 78 78 78 UNIT UNDER T ES T S T UB A S T UB B T RANS CEIVER A T RANS CEIVER B T erminal T EEADAPT ERS BT...

Page 59: ...COUPLING AND TERMINATION A 4 OmniBus II NI PXIe User Manual This page intentionally blank...

Page 60: ...olled transmit scheduling CH TA SA message filtering Sequential monitor and time stamping Error injection including MBZC shifting Playback with errors Amplitude controls 16 Open GND avionics discrete...

Page 61: ...ential pk pk Advanced Timing IRIG 64 bit hardware time tag 1 ns resolution IRIG A B input and output AM PWM o Generate or synchronize timer o Synchronize hardware time tags 10 MHz and PPS o Frame sync...

Page 62: ...ght 3 5 lbs 1 6 kg Physical Dimensions See the following diagrams for the dimensions of the OB2 PXIe Card Figure B 1 Dimensions of OmniBus II PXIe Card Environmental Component temperature 40 to 85 C S...

Page 63: ...5 7 W 12V 3 8 W 5 1 W 6 3 W 3 8 W 10 6 W 18 0 W Total 9 4 W 10 8 W 12 0 W 9 4 W 16 3 W 23 7 W PXIe MIL STD 1553 Model 222 544 544 Typical Maximum Core A Idle Active Active Idle Active Active Core B I...

Page 64: ...9 databus when power is removed from the OB2 This can result in an attenuated bus signal for other powered devices on the 429 databus This errata does not apply to Advanced ARINC 429 Modules 45x 42x 4...

Page 65: ...ERRATA SHEET C 2 OmniBus II PCIe PXIe User Manual This page intentionally blank...

Page 66: ...ons Corrected Installation Procedure Removed references to 708 717 Serial Minor copy update Rev C 0 Date December 13 2017 Added Section 1 7 Mean Time Between Failure added Appendix B Specifications in...

Page 67: ...REVISION HISTORY D 2 OmniBus II NI PXIe User Manual This page intentionally blank...

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