UniBoard
2
Manual
DESP
Doc.nr.:
ASTRON-IS-036 1.0
Rev.:0.1
Date:11/05/2015
Class.:
13 / 16
In the following subsections debug functions are described. The basic functions are described in [RD-5].
11.2.1 Version
With ‘v’ the version of the software and the chip can be readout. On the bottom of the version the mapping of
the switch ports to FPGA and copper ports are shown, where “ll” stands for lower left RJ45 port, “ul” for
upper left, “lr” for lower left and “ur” for the upper left port.
The result will look like:
UniBoard2 0.4
UniBoard2
Length Jumbo: 9600
Chip id: 273890e9
PRT0 PRT1 PRT2 PRT3 PRT4 PRT5 PRT6 PRT7 PRT8 PRT9 PRT10 PRT11 PRT12 PRT13
N0-0 N0-1 N1-0 N1-1 N2-0 N2-1 N3-0 N3-1 C ll C ul C lm C um C lr C ur
11.2.2 Status
With ‘s’ the status of the switch can be readout. This will plot the status of the port and the number of
transmitted and received octets since the last read out. The result will look like:
Port Status RXOCT TXOCT
0 Port Up 0x00000000 0x00000000
1 Port Down 0x00000000 0x00000000
2 Port Up 0x00000000 0x00000000
3 Port Down 0x00000000 0x00000000
4 Port Up 0x00000000 0x00000000
5 Port Down 0x00000000 0x00000000
6 Port Up 0x00000000 0x00000000
7 Port Down 0x00000000 0x00000000
8 Port Down 0x00000000 0x00000000
9 Port Up 0x00000000 0x00000000
10 Port Down 0x00000000 0x00000000
11 Port Down 0x00000000 0x00000000
12 Port Down 0x00000000 0x00000000
13 Port Down 0x00000000 0x00000000
11.2.3 Reboot
With ‘b’ the switch can be rebooted.
11.3 Power Readout
On Uniboard
2
digital power Point of loads are placed. This will enable readout of the power consumption per
regulator. This can be done by the FPGA, but for debugging an Ericsson controller and software can be used
to readout and adjust the converters. For this a header is placed close to every FPGA, see Figure 9.
