50
English
tRDWR_dd
Conigure between module read to write delay.
tWRRD_sg
Conigure between module write to read delay.
tWRRD_dg
Conigure between module write to read delay.
tWRRD_dr
Conigure between module write to read delay.
tWRRD_dd
Conigure between module write to read delay.
tWRWR_sg
Conigure between module write to write delay.
tWRWR_dg
Conigure between module write to write delay.
tWRWR_dr
Conigure between module write to write delay.
tWRWR_dd
Conigure between module write to write delay.
RTL (CH A)
Conigure round trip latency for channel A.
RTL (CH B)
Conigure round trip latency for channel B.
IO-L (CH A)
Conigure IO latency for channel A.
IO-L (CH B)
Conigure IO latency for channel B.
Summary of Contents for Super Alloy H170M PRO4
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