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[AK8975/C] 

7.2.1.3. Acknowledge 

The IC that is transmitting data releases the SDA line (in the "High" state) after sending 1-byte data. 
The IC that receives the data drives the SDA line to "Low" on the next clock pulse. This operation is referred to 
acknowledge. With this operation, whether data has been transferred successfully can be checked. 
AK8975/C generates an acknowledge after

 

reception of a start condition and slave address. 

When a WRITE instruction is executed, AK8975/C generates an acknowledge after every byte is received. 
When a READ instruction is executed, AK8975/C generates an acknowledge then transfers

 

the data stored at 

the specified address. Next, AK8975/C releases the SDA line then monitors the SDA line. If a master IC

 

generates an acknowledge

 

instead of

 

a stop condition, AK8975/C transmits the 8bit data stored at the next 

address. If no acknowledge is generated, AK8975/C stops data

 

transmission. 

 

SCL FROM
MASTER

acknowledge

DATA
OUTPUT BY
TRANSMITTER

DATA
OUTPUT BY
RECEIVER

1

9

8

START

CONDITION

Clock pulse
for acknowledge

not acknowledge

 

Figure 7.5 Generation of Acknowledge 

 

7.2.1.4. Slave 

Address 

The slave address of AK8975/C can be selected from the following list by setting CAD0/1 pin. When CAD pin 
is fixed to VSS, the corresponding slave address bit is “0”. When CAD pin is fixed to VDD, the corresponding 
slave address bit is “1”. 
 

CAD1 CAD0  Slave 

Address 

0 0 

0CH 

0 1 

0DH 

1 0 

0EH 

1 1 

0FH 

Table 7.1 Slave Address and CAD0/1 pin 

 

The first byte including a slave address is transmitted after a start condition, and an IC to be accessed is 
selected from the ICs on the bus according to the slave address. 
When a slave address is transferred, the IC whose device address matches the transferred slave address 
generates an acknowledge then executes an instruction. The 8th bit (least significant bit) of the first byte is a 
R/W bit. 
When the R/W bit is set to "1", READ instruction is executed. When the R/W bit is set to "0", WRITE 
instruction is executed. 

 

 

MSB LSB 

0 0 0 1 1 

CAD1

CAD0 

R/W 

Figure 7.6 Slave Address 

MS1187-E-02

 

- 19 - 

2010/05 

Summary of Contents for AK8975

Page 1: ...C specification Ver 2 1 4 wire SPI Operation mode Power down mode Single Measurement mode Self test mode and Fuse access mode DRDY function for measurement data ready Magnetic sensor overflow monitor...

Page 2: ...al logic power block and interface block are also integrated on a chip 2 Wide dynamic measurement range and high resolution with lower current consumption Output data resolution 13 bit 0 3 T LSB Measu...

Page 3: ...3 Magnetic Sensor Overflow 14 6 4 3 Self test Mode 15 6 4 4 Fuse ROM Access Mode 15 7 Serial Interface 16 7 1 4 wire SPI 16 7 1 1 Writing Data 16 7 1 2 Reading Data 17 7 2 I2 C Bus Interface 18 7 2 1...

Page 4: ...on 29 9 1 I2 C Bus Interface 29 9 2 4 wire SPI 30 10 Package 31 10 1 Marking 31 10 2 Pin Assignment 31 10 3 Outline Dimensions 32 10 4 Recommended Foot Print Pattern 33 11 Relationship between the Mag...

Page 5: ...e AMP output and performs analog to digital conversion OSC1 Generates an operating clock for sensor measurement 6 144MHz typ POR Power On Reset circuit Generates reset signal on rising edge of VDD Int...

Page 6: ...this pin electrically nonconnected 6 B4 SO O VID CMOS When the 4 wire SPI is selected Serial data output pin 7 C4 VID Power Digital interface positive power supply pin 8 NC1 Non contact pin Keep this...

Page 7: ...Vid V Low level input voltage 1 VIL1 CSB SK SI 30 Vid V High level input voltage 2 VIH2 70 Vid V Low level input voltage 2 VIL2 SCL SDA 30 Vid V High level input voltage 3 VIH3 70 Vdd V Low level inpu...

Page 8: ...ower down mode tPUP 10 Vdd 90 Vdd 5 3 3 Analog Circuit Characteristics Parameter Symbol Condition Min Typ Max Unit Measurement data output bit DBIT 13 bit Time for measurement TSM Single measurement m...

Page 9: ...5V 100 ns SK low time Twl 2 5V Vid 1 65V 150 ns SK setup time Tsd 50 ns SK to SO delay time Note 12 Tdd 50 ns CSB to SO delay time Note 12 Tcd 50 ns SK rise time Note 13 Tr 100 ns SK fall time Note 1...

Page 10: ...s tSU STO Stop Condition setup time 4 0 s tBUF Bus free time 4 7 s 2 Fast mode 100kHz fSCL 400kHz 1 65V Vid Vdd Symbol Parameter Min Typ Max Unit fSCL SCL clock frequency 400 kHz tHIGH SCL clock High...

Page 11: ...her digital pins should be fixed to L 0V 2 OFF 0V 1 65V to 3 6V OFF 0V It doesn t affect external interface 3 2 4V to 3 6V OFF 0V OFF 0V It consumes current same as Power down mode SCL SDA should be f...

Page 12: ...output Transits to Power down mode automatically Single measurement mode Sensor is measured for one time and data is output Transits to Power down mode automatically after measurement ended Fuse ROM...

Page 13: ...DY bit turns to 0 DRDY pin is in the same state as DRDY bit Operation Mode Single measuremnet Power down 1 2 3 Measurement period Measurement Data Register Last Data IndefiniteMeasurement Data 1 Indef...

Page 14: ...h Indefinite Nth Indefinite N 1 th Ind DRDY DERR Register Read ST1 Data ST2 ST1 Data ST2 ST1 Data ST2 Register Register Register Figure 6 4 Data Error 6 4 2 3 Magnetic Sensor Overflow AK8975 C has the...

Page 15: ...er 3 Set Self test Mode 4 Check Data Ready or not by any of the following method Polling DRDY bit of ST1 register Monitor DRDY pin When Data Ready proceed to the next step 5 Read measurement data HXL...

Page 16: ...is in transition Also it is prohibited to change SI pin during CSB pin is H and SK pin is H 7 1 1 Writing Data Input 16 bits data on SI pin in synchronous with the 16 bit serial clock input on SK pin...

Page 17: ...and CSB pin is L the data in the next address is output on SO pin When CSB pin is driven L to H SO pin is placed in the high impedance state AK8975 C has two incrementation lines 00H to 0CH and 10H t...

Page 18: ...k on the SCL line When the clock signal on the SCL line is High the state of the SDA line must be stable Data on the SDA line can be changed only when the clock signal on the SCL line is Low During th...

Page 19: ...MASTER acknowledge DATA OUTPUT BY TRANSMITTER DATA OUTPUT BY RECEIVER 1 9 8 START CONDITION Clock pulse for acknowledge not acknowledge Figure 7 5 Generation of Acknowledge 7 2 1 4 Slave Address The s...

Page 20: ...ays stops with a stop condition generated by the master MSB LSB D7 D6 D5 D4 D3 D2 D1 D0 Figure 7 8 Control Data AK8975 C can write multiple bytes of data at a time After reception of the third byte co...

Page 21: ...ments the internal counter by one If the master IC generates a stop condition instead of an acknowledge after AK8975 C transmits one byte of data the read operation stops SDA S T A R T A C K A C K S S...

Page 22: ...H READ Status 2 8 Data status CNTL 0AH READ WRITE Control 8 RSV 0BH READ WRITE Reserved 8 DO NOT ACCESS ASTC 0CH READ WRITE Self test 8 TS1 0DH READ WRITE Test 1 8 DO NOT ACCESS TS2 0EH READ WRITE Tes...

Page 23: ...0 0 Write read Register 0AH CNTL 0 0 0 0 MODE3 MODE2 MODE1 MODE0 0BH RSV 0CH ASTC SELF 0DH TS1 0EH TS2 0FH I2CDIS I2CDIS Read only Register 10H ASAX COEFX7 COEFX6 COEFX5 COEFX4 COEFX3 COEFX2 COEFX1 CO...

Page 24: ...D0 Read only register 01H INFO INFO7 INFO6 INFO5 INFO4 INFO3 INFO2 INFO1 INFO0 INFO 7 0 Device information for AKM 8 3 3 ST1 Status 1 Addr Register name D7 D6 D5 D4 D3 D2 D1 D0 Read only register 02H...

Page 25: ...ower 8bit HXH 15 8 X axis measurement data higher 8bit HYL 7 0 Y axis measurement data lower 8bit HYH 15 8 Y axis measurement data higher 8bit HZL 7 0 Z axis measurement data lower 8bit HZH 15 8 Z axi...

Page 26: ...verflow even though measurement data regiseter is not saturated In this case measurement data is not correct and HOFL bit turns to 1 When next measurement stars it returns to 0 Refer to 6 4 2 3 for de...

Page 27: ...1 2 Addr Register name D7 D6 D5 D4 D3 D2 D1 D0 Write read register 0DH TS1 0EH TS2 Reset 0 0 0 0 0 0 0 0 TS1 and TS2 registers are test registers for shipment test Do not use these registers 8 3 10 I...

Page 28: ...adjustment data for each axis is stored to fuse ROM on shipment ASAX 7 0 Magnetic sensor X axis sensitivity adjustment value ASAY 7 0 Magnetic sensor Y axis sensitivity adjustment value ASAZ 7 0 Magn...

Page 29: ...pen open open Interrupt Host CPU I2 C i f Power for i f VID POWER 1 65V Vdd VDD POWER 2 4V 3 6V 0 1 F 0 1 F 1 2 3 4 5 CSB RSV SCL SK CAD1 NC2 TST2 VSS VDD 12 11 10 9 open Slave address select CAD1 CAD...

Page 30: ...1 SDA SI SO CAD0 VID 8 7 6 16 15 14 13 open open open Interrupt Host CPU 4 wireSPI i f Power for i f VID POWER 1 65V Vdd VDD POWER 2 4V 3 6V 0 1 F 0 1 F 1 2 3 4 5 CSB RSV SCL SK CAD1 NC2 TST2 VSS VDD...

Page 31: ...4X5 X1 ID X2 Year code X3X4 Week code X5 Lot Top view 8975C AKM X1X2X3X4X5 8975 X1X2X3X4X5 10 2 Pin Assignment AK8975 14 SO AKM 8975 XXXXX 15 VID 16 NC1 8 7 SCL SK 4 RSV 3 TST6 9 DRDY 10 NC2 11 CAD1 1...

Page 32: ...1 4 8 5 12 9 13 16 4 00 0 10 A B 0 75 0 05 2 6 4 3 2 1 1 96 D C B A 1 96 8975C XXXXX 0 075 C 0 65 max C 0 40 0 19 0 5 1 5 1 5 0 5 0 27 0 03 D C B A 1 2 3 4 0 08 C 0 65 REF 0 30 0 05 2 6 0 10 4 1 0 10...

Page 33: ...AK8975 C 10 4 Recommended Foot Print Pattern AK8975 mm AK8975C mm 0 5 0 5 0 25 D C B A 4 3 2 1 MS1187 E 02 33 2010 05...

Page 34: ...support or other hazard related device or systemNote2 and AKM assumes no responsibility for such use except for the use approved with the express written consent by Representative Director of AKM As...

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