Arrow Everest-CortexM1-SFP+Loop-Demo User Manual Download Page 12

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Arrow Central Europe GmbH

page 12

User Guide

Everest-CortexM1-Demo

3.2

Prerequisites

Software and IP core requirements are the same for Everest DEV Board PROTO and Rev. A

and B.

Table 1: Software / IP Requirements

Software

Version

Libero SoC PolarFire

V2.2

Synplify Pro

L2017.09M-SP1-1

FlashPro PolarFire

V2.0

CortexM1

3.0.100

PF_SRAM_ABHL_AXI

1.1.125

PF_INIT_MONITOR

2.0.103

CoreAHBLite

5.3.101

CoreAHBTOAPB3

3.1.100

CoreAPB3

4.1.100

PF_OSC

1.0.102

PF_CCC

1.0.113

CoreUARTapb

5.6.102

CoreGPIO

3.2.102

COREI2C

7.2.101

PF_XCVR_REF_CLK

1.0.103

PF_TX_PLL

1.0.112

PF_XCVR

1.0.231

Before you start you have to make sure, that all cores are downloaded to your local vault.

Summary of Contents for Everest-CortexM1-SFP+Loop-Demo

Page 1: ...Started created S Rieche Date 2018 02 19 edited S Rieche Date 2018 06 18 approved Date Filename Everest CortexM1 SPF Loop Demo Getting_Started_1p1 docx Arrow Central Europe GmbH Version 1 1 Page 1 of 19 Everest CortexM1 SFP Loop Demo Getting Started ...

Page 2: ...le 7 2 3 3 DIP Switch S8 FMC Voltage Selector 7 2 3 4 Toggle Switch S9 VDDAUX2 VDDAUX5 Voltage 7 2 4 Board Setup Revision A and B 8 2 4 1 Toggle Switch S1 PCIe 8 2 4 2 Toggle Switch S5 SC SPI Flash enable 8 2 4 3 DIP Switch S8 FMC Voltage Selector 8 2 4 4 Toggle Switch S9 VDDAUX2 VDDAUX5 Voltage 8 2 5 Powering up the Board 9 3 Demo Design 10 3 1 SFP related differences between Everest DEV Board PR...

Page 3: ...tion Top Level Everest DEV Board PROTO 13 Figure 5 Design Implementation Top Level Everest DEV Board Rev A and B 14 Figure 6 Design Implementation Modul PF_XCVR_8b10b 14 Figure 7 SoftConsole v5 1 workspace launcher 16 Figure 8 SoftConsole v5 1 starting the debug session 16 Figure 9 SoftConsole v5 1 running the design 17 Figure 10 terminal output after startup 18 Figure 11 Terminal Output sending s...

Page 4: ...Arrow Central Europe GmbH page 4 User Guide Everest CortexM1 Demo Tables Table 1 Software IP Requirements 12 Table 2 Hardware Design Clock Frequencies 13 ...

Page 5: ...sion history describes the changes that were implemented in the document The changes are listed by revision starting with the most current publication 1 1 Revision 1 1 The document was updated for Libero SoC PolarFire v2 2 1 2 Revision 1 0 Revision 1 0 is the first publication of this document ...

Page 6: ...ame Every frame consists of the comma character BC the actual frame counter value and the hexadecimal representation of the ASCII character and is printed out on UART 0 2 1 Prerequisites For the Everest Cortex M1 SFP Loop Demo the following is needed Item Quantity Everest DEV Board 1 12 V 5 A wall mounted power adapter 1 USB 2 0 A male to mini USB B cable for UART Programming interface to PC 1 Int...

Page 7: ...rning S1 1 and S1 2 must not be at position on at the same time SWITCH ON PCIe LANES S1 1 x1 S1 2 x4 2 3 2 Toggle Switch S5 SC SPI Flash enable Warning S5 1 and S5 2 must not be at position on at the same time SWITCH ON SC SPI FLASH S5 1 ENABLE S5 2 DISABLE 2 3 3 DIP Switch S8 FMC Voltage Selector Warning S8 1 to S8 4 must not be at position on at the same time SWITCH ON FMC VOLTAGE S8 1 3 3 V S8 ...

Page 8: ... 4 2 Toggle Switch S5 SC SPI Flash enable SWITCH SC SPI FLASH S5 1 marking DISABLE S5 2 ENABLE 2 4 3 DIP Switch S8 FMC Voltage Selector SWITCH FMC VOLTAGE S8 1 off S8 2 off 1 8 V S8 1 on S8 2 off 2 5 V S8 1 off S8 2 on undefined not recommended S8 1 on S8 2 on 3 3 V 2 4 4 Toggle Switch S9 VDDAUX2 VDDAUX5 Voltage SWITCH VDDAUX2 VDDAUX5 S9 1 marking 2 5 V S9 2 FMC voltage ...

Page 9: ...al Transceiver into the J1 connector SFP module cage A loop has to be built by connecting the transmitter with the receiver with an optical fiber cable The Everest DEV Board is powered up using the 12 V DC jack For programming connect it although with your computer using USB mini B connector J9 Figure 1 Everest Board ...

Page 10: ...ences between Everest DEV Board PROTO and Revision A and B On Everest DEV Board PROTO the SFP signals RX_LOS RS0 RS1 TX_DIS and TX_FAULT could only be accessed via the I2C I O expander PCA9538 that is connected to the same I2C bus as the SFP interface itself Figure 2 SFP hardware Everest DEV Board PROTO ...

Page 11: ...Arrow Central Europe GmbH page 11 User Guide Everest CortexM1 Demo On Everest DEV Board Rev A and B these signals are routed directly to GPIOs Figure 3 SFP hardware Everest DEV Board Rev A and B ...

Page 12: ...ro SoC PolarFire V2 2 Synplify Pro L2017 09M SP1 1 FlashPro PolarFire V2 0 IP CortexM1 3 0 100 PF_SRAM_ABHL_AXI 1 1 125 PF_INIT_MONITOR 2 0 103 CoreAHBLite 5 3 101 CoreAHBTOAPB3 3 1 100 CoreAPB3 4 1 100 PF_OSC 1 0 102 PF_CCC 1 0 113 CoreUARTapb 5 6 102 CoreGPIO 3 2 102 COREI2C 7 2 101 PF_XCVR_REF_CLK 1 0 103 PF_TX_PLL 1 0 112 PF_XCVR 1 0 231 Before you start you have to make sure that all cores ar...

Page 13: ...K PCLK 27 5 PF_TX_PLL 156 25 DIV_CLK 125 The top level design implementation for Everest DEV Board PROTO is shown in Figure 4 Figure 4 Design Implementation Top Level Everest DEV Board PROTO The top level design implementation for Everest DEV Board Rev A and B has an extra CoreGPIO called SFP_CTRL that receives the signal SFP_MOD SFP_TX_FAULT and SFP_RX_LOS including interrupt generation for those...

Page 14: ...14 User Guide Everest CortexM1 Demo Figure 5 Design Implementation Top Level Everest DEV Board Rev A and B The implementation of submodule PF_XCVR_8b10b is the same for all revisions Figure 6 Design Implementation Modul PF_XCVR_8b10b ...

Page 15: ...ld happen automatically when plugged in the first time To program the design there are two possibilities Programming via Libero PolarFire SoC Programming is started with the Run PROGRAM Action Button in the Design Flow Pane Programming via FlashPro Software There is a STAPL File Design Directory designer CortexM1_Subsystem export CortexM1_Subsystem stp which can be programmed with the FlashPro Sof...

Page 16: ...n the CortexM1 Processor has to be loaded with the firmware To do so load the provided SoftConsole Workspace Figure 7 SoftConsole v5 1 workspace launcher Figure 8 SoftConsole v5 1 starting the debug session A debug configuration is provided to download the firmware to the CortexM1 processor and start the application ...

Page 17: ...Arrow Central Europe GmbH page 17 User Guide Everest CortexM1 Demo Figure 9 SoftConsole v5 1 running the design ...

Page 18: ...l be looped through the fiber of the SFP The output of terminal 0 shows the contend of the receiver module Every line starts with the comma character BC followed by the actual frame counter value The end represents the hexadecimal value of the ASCII character 0x78 x 0x20 space etc Figure 11 shows the terminal output after sending some characters ...

Page 19: ...Arrow Central Europe GmbH page 19 User Guide Everest CortexM1 Demo Figure 11 Terminal Output sending some characters via SFP Loop ...

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