7
3.4 THE UART LOGIC
The MCF5204 has a built in UART, This serial channel with software programmable baud rate generator
is not used by the SBC5204 or dBUG and it is available to the user. The dBUG, however, programs the
interrupt level for UART to Level 3, priority 2 and autovector mode of operation. The signals of this
channel are available on J9 and are passed through the RS-232 driver/receiver and are available on DB-9
connector J6. Refer to the MCF5204 User’s Manual for programming and the register map.
3.4.1 MC68HC901
To provide the board with one independent serial communication channel for dBUG communication with
terminal or PC, an MC68HC901 is used. This device provides four timer channels (A, B, C, and D), one
serial communication channel, and 8 input lines. Channel D timer is used as the baud rate generator for the
serial communication channel.
The clock source for the timers is the 2.4576MHZ crystal. The clock signal to drive the MC68HC901
logic is one-fourth of the processor’s clock.
The TXD (SO) signal and the RXD (SI) signal are passed through RS-232 driver/receiver and are
available on J1. The eight input lines are used to report the ISA Bus interrupts (IRQ3, IRQ4, IRQ5, IRQ6,
IRQ7, IRQ9, IRQ10, and IRQ11). The interrupt from MC68HC901 is reported to MCF5204 on -IRQ1
of the MCF5204. The interrupt level for the MC68HC901 is set for Level 1 with priority 3. The vectors
used for MC68HC901 are $F0 to $FF. It generates 16 vectors. This should not be changed.
The -CS2 is used to access the MC68HC901 internal registers, it is mapped to $03000000. The -CS3 is
programmed to generate an Interrupt Acknowledge signal to drive the -IACK of the MC68HC901. Refer
to MC68HC901 User’s Manual for functional description and the programming model.
3.5 THE PARALLEL I/O Port
The MCF5204 has one 8-bit parallel port. All the pins have dual functions. They can be configured as I/O
or their alternate function via the Pin Assignment register. PA0/A20 and PA1/A21 are available on J8 and
the rest are available on J9. User may use them based on the application. However, A20 will be used by
8M EPROM’s if they are installed. Otherwise A20 and A21 can be changed to I/O pin. For more
information on this refer to MCF5204 User’s Manual from Motorola. The dBUG programs these pins for
their dedicated peripheral functions.
3.6 THE ISA BUS LOGIC
The SBC5204 includes the necessary logic, drivers, and the connector (P1) to allow the use of off-the-shelf
ISA Bus I/O cards. The slot can be used with 8- or 16-bit ISA cards. Due to architectural differences
between ISA and ColdFire buses, all accesses to the ISA bus must be 16-bits. In addition, for byte
accessing, even ISA-space addresses are located starting at $04000000, and odd ISA-space addresses are
located starting at $04010000. For example, consider 4 sequential registers starting at ISA-space address
$320. Their ColdFire addresses become, in order, $04000320, $04010320, $04000322, and $04010322
.
The main purpose for this setup is to allow the use of Ethernet card (NE2000 compatible) to facilitate
network down load, refer to chapter 2 for network download command (DN). The dBUG driver only
accepts 100% NE2000 compatible cards.
