ARM Prospector P1100, User Manual, Page: 121 / 154

Programmer’s Reference
ARM DUI 0122A Copyright © ARM Limited 2000. All rights reserved. 4-35
4.7.2 Data exchange protocol
A transaction between the SA-1100 and ADS7843 consist of:
• writing a control byte to the ADS7843
• reading an 8 or 12-bit conversion word from the ADS7843.
Each complete transaction between the CPU and ADS7843 takes 16 clock cycles
(CPU_SPI_SCLK). Figure 4-10 shows the timing for an 8-bit conversion.
Figure 4-10 ADS7843 SPI bus timing
Note
• Before a transaction can begin, you must enable the interface to the ADS7843 and
disable the PENIRQ interrupt by setting the TCH_EN bit in the PLD_TCH
register HIGH (see Touch screen register on page 4-19).
• When the transaction is completed, you must disable the interface to the
ADS7843 and enable the PENIRQ interrupt by setting the TCH_EN bit LOW.
The transaction between the CPU and ADS7843 is as follows:
• The CPU enables the interface by setting the TCH_EN bit in the PLD_TCH
register HIGH.
• During the first eight clock cycles, the control byte is written to the ADS7843 on
CPU_SPI_TXD, with the ADS7843 sampling on the rising edge of the clock
signal
• As soon as it has enough data (after the first five bits), the ADS7843 begins to
acquire a sample.
• The CPU begins to read the conversion data on the 9th clock, starting with the
MSB.
PLD_SPI_CS3
CPU_SPI_TXD
CPU_SPI_RXD
CPU_SPI_SCLK
7 0 7
S S
Control byte Control byte
1 16 1