The Cortex-M4 Processor
ARM DUI 0553A
Copyright © 2010 ARM. All rights reserved.
2-28
ID121610
Non-Confidential
Exception return
Exception return occurs when the processor is in Handler mode and executes one of the
following instructions to load the EXC_RETURN value into the PC:
•
an
LDM
or
POP
instruction that loads the PC
•
an
LDR
instruction with PC as the destination
•
a
BX
instruction using any register.
EXC_RETURN is the value loaded into the LR on exception entry. The exception mechanism
relies on this value to detect when the processor has completed an exception handler. The lowest
five bits of this value provide information on the return stack and processor mode.
shows the EXC_RETURN values with a description of the exception return behavior.
All EXC_RETURN values have bits[31:5] set to one. When this value is loaded into the PC it
indicates to the processor that the exception is complete, and the processor initiates the
appropriate exception return sequence.
Table 2-17 Exception return behavior
EXC_RETURN[31:0]
Description
0xFFFFFFF1
Return to Handler mode, exception return uses non-floating-point state
from the MSP and execution uses MSP after return.
0xFFFFFFF9
Return to Thread mode, exception return uses non-floating-point state from
MSP and execution uses MSP after return.
0xFFFFFFFD
Return to Thread mode, exception return uses non-floating-point state from
the PSP and execution uses PSP after return.
0xFFFFFFE1
Return to Handler mode, exception return uses floating-point-state from
MSP and execution uses MSP after return.
0xFFFFFFE9
Return to Thread mode, exception return uses floating-point state from
MSP and execution uses MSP after return.
0xFFFFFFED
Return to Thread mode, exception return uses floating-point state from PSP
and execution uses PSP after return.