Arm
®
CoreLink™ GFC-200 Generic Flash Controller
Technical Reference Manual
Document ID: 101484_0000_01_en
Issue: 01
Functional Description
The GFC-200 interprets
faddr
as little endian, so if
FWDATA_WIDTH
<
FRDATA_WIDTH
then the
faddr[3:2]
bits select the location of the write data within the wider GFB data bus. For example, if:
FWDATA_WIDTH
=32,
FRDATA_WIDTH
=64
faddr[2]
selects the location of the 32-bit write data in the 64-bit data bus.
FWDATA_WIDTH
=32,
FRDATA_WIDTH
=128
faddr[3:2]
selects the location of the 32-bit write data in the 128-bit data bus.
FWDATA_WIDTH
=64,
FRDATA_WIDTH
=128
faddr[3]
selects the location of the 64-bit write data in the 128-bit data bus.
Delayed response
The GFC-200 is the GFB manager and drives commands over the GFB. A GFB receiver is allowed
to delay its response to the commands. The process-specific part can take several cycles to
respond to READ commands. However, WRITE and ERASE commands can take many more cycles
to execute.
Error response
For GFB transfers that fail, the process-specific part can generate a 2-cycle error response. If the
process-specific part generates a 2-cycle error response, the GFC-200 either:
• Generates an AHB ERROR response, when the transaction originates from an AHB manager.
• Sets STATUS.CMD_FAIL = 1, when the transaction originates from an APB requester.
If a transfer fails, then the effect on the Flash macro contents is non-deterministic because it
depends on the implementation of the Flash macro and the process-specific part.
Aborting commands
The APB requesters can abort commands that they initiate by writing to the CTRL.ABORT register
bit. When ABORT == 1, the GFC-200 sets the
fabort
signal HIGH. The method that the process-
specific part uses to support the abort function depends on its implementation.
• Commands from the AHB-Lite subordinate interface cannot be aborted.
• For more information about GFB transactions, see the
AMBA
®
Generic Flash Bus
Protocol Specification
.
Related information
on page 86
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