© Copyright ARM Limited 2016. All rights reserved.
WH000
ARM-EPM-1017464.0
Confidential
Page 13
3.4.2
5 Volt Test Pins:
Located on the lower left corner of the board are test points TP1 (Red, +5V) and TP2 (Black, GND). These are
voltage supply points to power the board from an external bench power supply.
The TP1 is tied to the same 5v input line as VBUS on the USB connector. The board is protected by a fuse for
both these 5 volt input signals.
3.4.3
J26- I
2
C Pins:
This connector is located along the center left edge of the board. This connector is provided to add additional off-
board I2C sensors for development and/or demonstration purposes. This 4 pin connector provides 1.8v output,
Gnd, SCL (Clock) and SDA (Data) signals. The I/O signals are level shifted from the 1.2 volt MCU interface to 1.8
volts.
3.4.4
J22
– GPIOs (and LEDS):
J22 is located just to the left of the Line/Battery power mode slide switch along the right edge of the board. The 4
pins on the top row of this header are 4 unused GPIO pins from the BT4 SoC (Level shifted to 3.3 volts). If the
user is utilizing the BT Eval Board as a firmware development platform, these lines can be programmed for
specific functions/indicators. A jumper can be placed across a pair of pins on J22 to connect the GPIO to a LED
for status indications.
Currently, GPIO 3 has functionality when the Eval board is in Demo mode (see Section 8.3), the other LEDs
currently have no function.
Please check the LED numbers vs the GPIOs on the board schematics as the row of
LEDs underneath J22 do not line up directly with the corresponding GPIO jumper label above them on older
revisions of the board. This was corrected in revision C of the Evaluation board.
3.4.5
J25
– AT Pins:
J25 can be found on the top left hand corner of the board. This consists of 4 Analog Test Pins. These pins are
used for measurement in various trimming and calibration procedures. Further explanation on the use of these
pins is beyond the scope of this document.
3.4.6
J24- Host Serial Wire Debug:
This header can be found along the left edge of the board. These signals are level shifted to a 3.3 volt level and
are provided for debug purposes when developing custom FW on the Eval board platform. The SWD jumpers (J6
& J7) must be in the Header position to route the SWD signals to the J24 header (See Section 3.3.4).
3.4.7
J17
– SPI Bus
The J17 header can be found just under the BT4 module in the upper center of the board. It provides access to
the SPI bus of the BT4 Development SoC for use with external devices.