PICDEM™ 17 Demonstration Board User’s Guide
DS39024B-page 28
2001 Microchip Technology Inc.
4.5
Interrupt Code File
The interrupt code file is used to setup the interrupt vectors for the INT pin,
TMR0 Overflow, T0CKI pin, and the Peripheral Interrupt vector. Included with
this code is the context save and restore routines that are called before and
after the interrupt service routines. The “real” interrupt vectors of the
PIC17C756A located at addresses 0008h, 0010h, 0018h, and 0020h have
been remapped to address location 4008h, 4010h, 4018h, and 4020h. The
original vectors have code that simply writes the associated vector address of
40??h to the PCLATH:PCL registers. This file would need to be assembled
and linked in with the other files in the project.
;*****************************************************************
;** PIC17C756A Interrupt Support File, Version 1.10
;** L a r g e M o d e l
;** PIC1DEM-17 Workshop Demo Board Version
;** (c) Copyright 1997 Microchip Technology
;*****************************************************************
list p=17c756
;
;------------------------ Equates --------------------------;
PCL equ 0x02
PCLATH equ 0x03
ALUSTA equ 0x04
BSR equ 0x0F
WREG equ 0x0A
SAVEINT_START equ 0x00FC ;Start of shared region for
;int.saving
;***********************************************************;
INTSAVE_SEC UDATA SAVEINT_START
;-----------------------------------------------------------;
; Save registers that absolutely need to be saved!
save_BSR RES 1 ;Used for saving the BSR - BANK 0 ONLY
save_WREG RES 1 ;WREG ;SPACE RESERVED ALSO IN ALL BANKS
save_ALUSTA RES 1 ;ALUSTA ;SPACE RESERVED ALSO IN ALL BANKS
save_PCLATH RES 1 ;PCLATH ;SPACE RESERVED ALSO IN ALL BANKS
;-----------------------------------------------------------;
;***********************************************************;
; save_ALUSTA and save_PCLATH are saved in any of the banks.
; We therefore must reserve the corresponding locations in ALL
; banks. Since BSR and WREG are guaranteed to be saved in
; bank 0, they only need storage locations in bank 0.
;-- Bank 1
INTSAVE_SEC1 UDATA SAVEINT 0x101
RES 1 ;WREG
RES 1 ;ALUSTA
RES 1 ;CPUSTA
;-- Bank 2
INTSAVE_SEC2 UDATA SAVEINT 0x201
RES 1 ;WREG
