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VIPER

Detailed hardware description

Translations made by the MMU

For details of translations made by the MMU by Redboot for embedded Linux, please
refer to VIPER embedded Linux Quickstart Manual.

For details of translations made by the MMU by Redboot for VxWorks, please refer to
VIPER VxWorks Quickstart and Technical Manual

For details of translations made by the MMU for Windows CE .NET, please check the
Windows CE .NET documentation for more information about memory mapping. One
source of this information is on the

under

Windows CE .NET Memory

Architecture

.

© 2004 Arcom Issue H

15

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Summary of Contents for VIPER

Page 1: ...VIPER Contents VIPER Intel PXA255 XScale RISC based PC 104 Single Board Computer Technical Manual www arcom com ...

Page 2: ...Forms Trademarks ARM and StrongARM are registered trademarks of ARM Ltd Intel and XScale are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries Windows CE NET is a trademark of the Microsoft Corporation CompactFlash is the registered trademark of SanDisk Corp Linux is a registered trademark of Linus Torvalds RedBoot and Red HatTM i...

Page 3: ...me Clock 21 Watchdog timer 22 Memory 23 Interrupt assignments 25 Flat panel display support 29 Audio 38 General purpose I O 39 USB interface 42 10 100BaseTX Ethernet 43 Serial COMs ports 45 PC 104 interface 48 JTAG and debug access 49 Power and power management 51 Power supplies 51 Power management 52 Connectors LEDs and jumpers 59 Connectors 60 Status LED s 69 Jumpers 70 Appendix A Contacting Arc...

Page 4: ...s making it ideal for power sensitive embedded communications and multimedia applications The board is available in the following standard variants VIPER 400 M64 F32 Intel XScale TM PXA255 400MHz microprocessor 64MByte SDRAM 32MByte FLASH VIPER 400 M64 F16 Intel XScale TM PXA255 400MHz microprocessor 64MByte SDRAM 16MByte FLASH VIPER 400 M64 F32 I Intel XScale TM PXA255 400MHz microprocessor 64MBy...

Page 5: ...ve Serial Ports 10 100BaseTX Ethernet Audio In Out MIC AMP Ethernet LEDs Power inc battery input Intel PXA255 XScale 400MHz processor 8 16 bit PC 104 interface USB CompactFLASH CF TFT STN panel JTAG Intel StrataFLASH Digital I O 2004 Arcom Issue H 5 ...

Page 6: ...ideo TFT STN 3 3V or 5V factory fit flat panel graphics controller Up to 800X600 resolution 8 16bpp Backlight Control Audio National Semiconductor A AC 97 CODEC 16bit and LM4880 Power Amp Line IN Line OUT Microphone and 250mW per channel amplified output Serial ports 5 x 16550 compatible high speed UARTs 4 x RS232 and 1 x RS422 485 Interfaces 2 x channels with 128Byte Tx Rx FIFO USB host interface...

Page 7: ...uts 5V tolerant User configuration 1 user configurable jumper Expansion PC 104 expansion bus 8 16 bit ISA bus compatible interface JTAG port Download data to FLASH memory Debug and connection to In Circuit Emulator ICE Power Typically 2W from a single 5V supply Power Management features allowing current requirements to be as low as 107mA 5mA 535mW 25mW Size PC 104 compatible footprint 3 8 x 3 6 96...

Page 8: ...echargeable battery For further details see www arcom com products icp pc104 processors viper_UPS htm VIPER ICE Industrial Compact Enclosure The VIPER ICE is a simple low cost aluminum enclosure which provides easy connection to all on board features The enclosure includes the VIPER UPS and optionally a color Q VGA 320x240 TFT flat panel display and analog touch screen VIPER FPIF1 Flat Panel Inter...

Page 9: ...ppropriate anti static packaging and wearing a wrist strap when handling the board Packaging Please ensure that should a board need to be returned to Arcom it is adequately packed preferably in the original packing material Electromagnetic compatibility EMC The VIPER is classified as a component with regard to the European Community EMC regulations and it is the users responsibility to ensure that...

Page 10: ... result in loss of data Jumper fitted on pin A Jumper fitted on pin B Jumper is fitted Jumper is not fitted B A B A Tables With tables such as that shown below the white cells show information relevant to the subject being discussed Grey cells are not relevant in the current context Byte lane Most Significant Byte Least Significant Byte Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Field RETRIG AUTO_ ...

Page 11: ...CompactFLASH cards for both memory and IO The VIPER supports hot swap changeover of the cards and notification of card insertion RedBoot supports ATA type CompactFLASH cards Files can be read providing the card is formatted with an EXT2 file system Eboot cannot boot from CompactFlash 5V CompactFLASH is not supported The CompactFLASH card can only be inserted one way into the socket The correct ori...

Page 12: ... 104 modules can be used with the VIPER to add extra functionality to the system This interface supports 8 16 bit ISA bus style peripherals Arcom has a wide range of PC 104 modules which are compatible with the VIPER These include modules for digital I O analog I O motion control video capture CAN bus serial interfaces etc Please contact the Arcom sales team if a particular interface you require d...

Page 13: ...er Switch USB Power Switch Buffers and Transceivers CPLD Buffers and Transceivers Address Data CF PC 104 Control Signals PC 104 Control PC 104 Address Data CF Address Data CF Control CF_SWITCH PL11 PL12 LAN91C111 PL1 PL2 10 100 baseTX Serial EEPROM Transformer Buffers and Transceivers PL9 IN 0 7 OUT 0 7 USB Host Controller PL7 USB1 2 X2 Voltage Monitor Triple Reg Reg Micropower DAC JTAG X3 Clock G...

Page 14: ...x47FFFFFF Reserved CS5 0x14500000 0x14500000 8 bit General Purpose Input PL9 see page 66 0x14300020 0x144FFFFF Reserved CS5 0x14300010 0x1430001F 8 bit COM4 see page 46 CS5 0x14300000 0x1430000F 8 bit COM5 see page 46 0x14100004 0x142FFFFF Reserved CS5 0x14100002 0x14100003 8 bit ICR Register see page 26 CS5 0x14100000 0x14100001 8 bit PC104I Register see page 26 0x10000004 0x140FFFFF Reserved CS4...

Page 15: ...For details of translations made by the MMU by Redboot for VxWorks please refer to VIPER VxWorks Quickstart and Technical Manual For details of translations made by the MMU for Windows CE NET please check the Windows CE NET documentation for more information about memory mapping One source of this information is on the msdn website under Windows CE NET Memory Architecture 2004 Arcom Issue H 15 ...

Page 16: ...ils The PXA255 has an integrated Memory and CompactFlash Controller with 100 MHz Memory Bus 32 KB data and 32 KB instruction caches and 2 KB Mini data cache for streaming data The PXA255 provides up to 85 GPIO pins many of these have been configured for alternative functions like the AC 97 and PC card CompactFLASH interfaces Details of these pin configurations are provided in the section PXA255 GP...

Page 17: ...INT1 Input Input COM 5 Interrupt 4 0 UART_INT2 Input Input COM 4 Interrupt Interrupt assignments page 25 and Wake up events page 58 5 0 USER_CONFIG1 Input NA Input User Config 1 Jumper LK2 User configurable jumper 1 LK2 page 70 6 0 PSU_DATA Output NA 0 Microprocessor Core Voltage DAC Data Processor power management page 55 7 0 Reserved Input NA Input Reserved Reserved LK3 page 70 8 0 CF_RDY Input ...

Page 18: ...N Bias STN BIAS voltage page 32 18 1 ARDY Input Low Input 10 100 Ethernet PHY Ready 19 0 PSU_nCS_LD Output Low 0 Microprocessor Core Voltage DAC Chip Select Processor power management page 55 20 0 OUT0 21 0 OUT1 22 0 OUT2 23 0 OUT3 24 0 OUT4 25 0 OUT5 26 0 OUT6 27 0 OUT7 Output User Config 0 User Config General purpose I O page 39 28 1 AC97_BITCLK Input Input BITCLK 29 1 AC97_IN Input NA Input SDA...

Page 19: ...a 44 1 CTS2 Input NA Input COM2 Clear To Send 45 2 RTS2 Output NA 0 COM2 Request To Send 46 2 RXD3 Input NA Input COM3 Receive Data 47 1 TXD3 Output NA 0 COM3 Transmit Data Serial COMs ports page 45 and PL4 COMS ports page 63 48 2 CB_POE Output Low Hi Z Socket 0 1 Output Enable 49 2 CB_PWE Output Low Hi Z Socket 0 1 Write Enable 50 2 CB_PIOR Output Low Hi Z Socket 0 1 I O Read 51 2 CB_PIOW Output ...

Page 20: ...13 72 2 LCD_D14 Output NA 0 LCD Data Bit 14 73 2 LCD_D15 Output NA 0 LCD Data Bit 15 74 2 LCD_FCLK Output NA 0 LCD Frame Clock STN Vertical Sync TFT 75 2 LCD_LCLK Output NA 0 LCD Line Clock STN Horizontal Sync TFT 76 2 LCD_PCLK Output NA 0 LCD Pixel Clock STN Clock TFT 77 2 LCD_BIAS Output NA 0 LCD Bias STN Date Enable TFT Flat panel display support page 29 and PL3 LCD connector page 62 78 2 ETHER...

Page 21: ...if the board is in an ambient environment of 25 C When the board is operated outside this temperature then the accuracy may be degraded by 0 035ppm C 10 typical The watch crystal s accuracy will age by 3ppm max in the first year then 1ppm max in the year after and logarithmically decreasing in subsequent years The following PXA255 GPIO pins are used to emulate the I C interface to the DS1307 RTC P...

Page 22: ... software Timeout periods can be adjusted from 271ns to 19 minutes 25 seconds When a timeout occurs the board is reset On reset the watchdog timer is disabled until enabled again by software For further details see the Arcom operating system Technical Manual and the Intel PXA255 developer s manual on the Development Kit CD 2004 Arcom Issue H 22 ...

Page 23: ...l blocks that are 64 Kword in size A 128Mbit device contains 128 blocks and 256Mbit device contains 256 blocks Flash cells within a block are organized by rows and columns A block contains 512 rows by 128 words The words on a row are divided into 16 eight word groups The PXA255 GPIO14 pin is connected to the FLASH memory status output This pin can be used to generate an interrupt to indicate the c...

Page 24: ...y fitting an external battery to power the device in the event of power loss on the main VIPER 5V supply See the section Battery backup page 51 for details CompactFLASH The CompactFLASH connector PL5 is interfaced to Slot 0 of the PXA255 PC card controller and appears in PC card memory space socket 0 This is a hot swappable 3 3V interface controlled by the detection of a falling edge on GPIO32 whe...

Page 25: ...manual on the Development Kit CD External interrupts The following table lists the PXA255 signal pins used for generating external interrupts PXA255 Pin Peripheral Active GPIO0 Ethernet GPIO1 PC 104 interrupt controller See PC 104 interrupts page 26 GPIO2 USB GPIO3 COM5 GPIO4 COM4 GPIO8 CompactFLASH RDY nBSY Ready Busy GPIO14 FLASH OS Ready Busy GPIO32 CompactFLASH card detect 2004 Arcom Issue H 2...

Page 26: ...st Significant Byte Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Field IRQ12 IRQ11 IRQ10 IRQ7 IRQ6 IRQ5 IRQ4 IRQ3 Reset X X X X X X X X 0 0 0 0 0 0 0 0 R W R W Address 0x14100000 PC 104 interrupts IRQ9 IRQ14 and IRQ15 are not used by the VIPER please use an alternate interrupt source from the table above The ICR Register located at offset 0x100002 from CS5 0x14000000 must be set up correctly for the ...

Page 27: ...rks Leave the ICR register set to its default value so that a new interrupt causes the microprocessor PC 104 interrupt pin GPIO1 to be toggled for every new interrupt on a different PC 104 interrupt source Ensure the GPIO1 input is set up in a level triggered mode The retrigger interrupt function is not required for embedded Linux or VxWorks The following diagram gives an example of how the PC 104...

Page 28: ... interrupts outstanding the level of the PC 104 interrupt on GPIO1 shall automatically return to logic 0 If it is still 1 then there are interrupts outstanding which would have occurred during the servicing of the last interrupt To capture any interrupts that could have occurred whilst the last interrupt was serviced the retrigger interrupt bit in the ICR register is set to 1 to retrigger a low to...

Page 29: ...ependant on the compromises that can be made between the LCD refresh rate and the application A full explanation of the graphics controller operation can be found in the PXA255 data sheets included on the support CD The flat panel data and control signals are routed to PL3 See the section PL3 LCD connector page 62 for pin assignment and part number details The VIPER FPIF1 allows the user to easily...

Page 30: ...d 5 bits of blue since the human eye can distinguish more shades of green than of red or blue STN panel data bit mapping to the VIPER Panel data bus Bit Dual scan color STN Single scan color STN Dual scan mono STN FPD 15 DL6 G NA NA FPD 14 DL6 R NA NA FPD 13 DL5 B NA NA FPD 12 DL4 G NA NA FPD 11 DL3 R NA NA FPD 10 DL2 B NA NA FPD 9 DL1 G NA NA FPD 8 DL0 R NA NA FPD 7 DU7 G D7 G DL3 FPD 6 DU6 R D6 ...

Page 31: ...n during power up down to ensure the panel is not damaged due to the input signals being incorrectly configured Typically the power up sequence is as follows please check the datasheet for the particular panel in use 1 Enable display VCC 2 Enable flat panel interface 3 Enable backlight Power down is in reverse order LCD backlight enable The PXA255 GPIO9 pin controls the LCD Inverter supply voltage...

Page 32: ...ght inverter used in the display Some inverters have a DIM function which uses a logic level to choose between two levels of intensity If this is the case then GPIO16 Alternative Function 0 is used to set this Other inverters have an input suitable for a pulse width modulated signal in this case GPIO16 should be configured as PWM0 Alternative Function 2 STN BIAS voltage The VIPER provides a negati...

Page 33: ... PL3 LK1 PL1 PL4 The connectors on the following pages are shown in the same orientation as the picture above Connector Function LK1 TFT Clock Delay Selection PL1 Connects to the VIPER PL2 Generic LCD Connector PL3 Direct connection to a NEC NL3224BC35 20 5 5inch 320x240 TFT Display PL4 Connects to Backlight Inverter PL5 STN Bias Voltages 2004 Arcom Issue H 33 ...

Page 34: ... x 2 54mm 0 1 straight boxed header Mating connector Oupiin 1203 40GB Pin Signal Name Pin Signal Name 1 BLKEN 2 BLKSAFE 3 GND 4 GND 5 NEGBIAS 6 LCDSAFE 7 GPIO16 PWM0 8 POSBIAS 9 GND 10 GND 11 BLUE_DATA0 12 BLUE_DATA1 13 BLUE_DATA2 14 BLUE_DATA3 15 GND 16 GND 17 BLUE_DATA4 18 GREEN_DATA0 19 GREEN_DATA1 20 GREEN_DATA2 21 GND 22 GND 23 GREEN_DATA3 24 GREEN_DATA4 25 GREEN_DATA5 26 FPD11 27 GND 28 GND ...

Page 35: ...PL2 a wide range of LCD displays can be connected with a custom cable Pin Signal Name Pin Signal Name 1 GND 2 BLUE_DATA0 3 BLUE_DATA1 4 BLUE_DATA2 5 GND 6 BLUE_DATA3 7 BLUE_DATA4 8 GREEN_DATA0 9 GREEN_DATA1 10 GND 11 GREEN_DATA2 12 GREEN_DATA3 13 GREEN_DATA4 14 GREEN_DATA5 15 GND 16 GND 17 RED_DATA0 18 RED_DATA1 19 RED_DATA2 20 GND 21 RED_DATA3 22 RED_DATA4 23 GND 24 PCLK 25 GND 26 LCDSAFE 27 LCDS...

Page 36: ...ignal Name Pin Signal Name 1 PCLK 18 GREEN_DATA5 2 LCLK 19 GND 3 FCLK 20 GND 4 FCLK 21 BLUE_DATA0 5 GND 22 BLUE_DATA1 6 GND 23 BLUE_DATA2 7 RED_DATA0 24 BLUE_DATA3 8 RED_DATA1 25 BLUE_DATA4 9 RED_DATA2 26 GND 10 RED_DATA3 27 LBIAS 11 RED_DATA4 28 LCDSAFE 12 GND 29 LCDSAFE 13 GREEN_DATA0 30 GND 14 GREEN_DATA1 31 GND 15 GREEN_DATA2 32 GND 16 GREEN_DATA3 33 GND 17 GREEN_DATA4 2004 Arcom Issue H 36 ...

Page 37: ...amatome 76384 407 Mating Connector Framatome 65240 007 Pin Signal Name 1 GND 2 PWM0 3 BKLEN GND 5 GND 4 6 BKLSAFE 7 BKLSAFE PL5 STN Bias connector Connector Framatome 76384 404 Mating Connector Framatome 65240 004 Pin Signal Name 1 NEGBIAS 2 GND 3 GND 4 POSBIAS 2004 Arcom Issue H 37 ...

Page 38: ...required See the section Audio power management page 58 for details Connection to the VIPER Audio features is via header PL6 See the table below for pin assignments and the section PL6 Audio connector page 65 for connector and mating connector details Function Pin Signal Signal levels max 10 MIC Microphone 7 Audio ground reference 1Vrms input 1 Line input left 5 Line input right Line in 3 Audio gr...

Page 39: ...the 8 inputs from PL9 VIPER Inputs PXA255 data IN0 D0 IN1 D1 IN2 D2 IN3 D3 IN4 D4 IN5 D5 IN6 D6 IN7 D7 PXA255 Transceiver PL9 D 0 7 IN 0 7 3 3V 10k ohms The PXA255 is not designed to interface to 8 bit peripherals so when the 8 bits of data are read only the least significant byte from the word contains the data Data bus Most Significant Byte Least Significant Byte D15 D14 D13 D12 D11 D10 D9 D8 D7...

Page 40: ...ce Windows CE NET is booted you can simply write to a mapped address For an example of how to do this under Windows CE NET please see the Windows CE NET Technical Manual Please note IN0 7 cannot be configured as outputs as they are hardwired as input only by a buffer OUT0 7 cannot be configured as inputs as they are hardwired as output only by a buffer The GPIO lines are programmed using the GPCR0...

Page 41: ...VIPER Detailed hardware description The following general purpose IO lines are used by the VIPER UPS Function IO External Power Fail IN0 Battery Low IN1 UPS Power down OUT0B 2004 Arcom Issue H 41 ...

Page 42: ...control If the USB voltage is short circuited or more than 500mA is drawn from either supply the switch turns off the power supply and automatically protects the device and board The VBUS power supply is derived from the VIPER 5V supply If you require details for the USB bus or would like to determine whether particular peripherals are available see www usb org A factory fit option changes USB por...

Page 43: ...utput lines sink current when switched on therefore the anode of each LED should be connected to pins 1 and 3 of PL2 and the cathode to the appropriate status line The Link LED illuminates when a 10 or 100base T link is made and the Activity LED illuminates when there is Tx or Rx activity Ethernet breakout board Arcom can provide an Ethernet breakout board with an RJ45 connector to interface to th...

Page 44: ... Pin Signal Name Pin Signal Name 1 Tx 1 Tx 1 Tx 2 TX 2 TX 2 TX 3 RX 3 RX 3 RX 4 RJ 2 4 RJ 2 4 RJ 2 5 RJ 2 5 RJ 2 5 RJ 2 6 RX 6 RX 6 RX 7 RJ 1 7 RJ 1 7 RJ 1 8 LANGND 8 RJ 1 8 LANGND Ethernet LED signal mapping between VIPER and Ethernet breakout connectors Ethernet breakout PL2 1x 4 way header VIPER PL2 Ethernet status LED s connector Pin Signal Name Pin Signal Name 1 LINK LED 1 3 3V 2 LINK LED 2 L...

Page 45: ...e see the Intel Developer s Manual for details of internal interrupts COM1 RS232 interface Uses the Full Function UART in the PXA255 FFUART The port is buffered to RS232 levels by a 5V transceiver with 15kV ESD protection and supports full handshaking and modem control signals Maximum baud rate on this channel is 230kb s this is limited by the transceiver performance A factory fit option configure...

Page 46: ...he network See RS485 422 configuration LK4 LK5 LK6 and LK7 page 71 for details RS485 This is a half duplex interface that provides combined TX and RX signals PL4 pin 5 provides TXB RXB and pin 6 provides TXA RXA A ground connection is also required for this interface The maximum cable length for this interface is the same as RS422 4000ft but RS485 supports up to 32 transmitters and receivers on a ...

Page 47: ...ers Enabled always Duplex Mode half LK6 A LK7 A Number of Wires 5 Transmitters Enabled active RTS Receivers Enabled always Duplex Mode full LK6 B LK7 B Number of Wires 5 Transmitters Enabled always Receivers Enabled always Duplex Mode full LK6 B LK7 B RS422 MULTI DROP RS422 POINT TO POINT RS485 MULTI DROP 2004 Arcom Issue H 47 ...

Page 48: ...0x3CFFFFFF PC 104 memory space 16MB 0x30000400 0x3BFFFFFF Reserved 0x30000000 0x300003FF PC 104 I O space 1kB The PC 104 bus signals are compatible with the ISA bus electrical timing definitions DMA bus mastering and shared interrupts are not supported on the VIPER s PC 104 interface For details on PC 104 Interrupts please see PC 104 interrupts page 26 The VIPER provides 5V to a PC 104 add on boar...

Page 49: ...XA255 processor The tables below detail the pins connections between the VIPER and MajicMX Compare PL10 and PL17 pin numbers to match VIPER JTAG connection to the MajicMX connections VIPER JTAG Connections Connector Pin Name Description 1 VCC3 3 3V Supply pin to JTAG debug tool 3 GND Ground reference 3 GND Not required on VIPER 4 nTRST PXA255 JTAG interface reset 6 TDI JTAG test data input to the ...

Page 50: ... 7 TDO JTAG test data input to the MajicMX 8 TMS MajicMX JTAG test mode select PL10 9 TCK MajicMX JTAG test clock 6 nSRST Open collector system reset VSupply Not used DBGREQ Never used PL17 DBGACK Used for tracing with MAJICPLUS passive probe The MajicMX probe supports industry standard debugger APIs such GNU gdb for Linux and Microsoft Platform Builder for Windows CE NET which allows you to choos...

Page 51: ... the total current requirement on 3 3V does not exceed 900mA Please check the datasheets of the devices you are using as there is no on board protection Battery backup An external battery CR2032 or similar providing 3 0V to 3 3V can be used as a battery backup for the DS1307 RTC and the SRAM The external battery supplies power to the battery backup circuit only when there is no 5V supply to the bo...

Page 52: ...eral devices Processor power estimations Take into account the processor operating frequency core voltage and memory frequency for the application The figures shown in the table below are when the processor memory frequency is set to 100MHz Currently embedded Linux and VxWorks supports changing the operating frequency and Windows CE NET will provide support shortly Please refer to the relevant ope...

Page 53: ...H socket CompactFLASH memory or Microdrive Flat Panel Display TFT logic backlight STN logic backlight bias voltage The table give examples of addition current power from external peripheral devices Device Part Number Condition Additional Current mA Additional Power mW Inserted no access 1 5 32MB Sandisk CompactFLASH SDCFB 32 101 80 Reading consistently 48 240 Inserted no access 75 375 64MB FlashDi...

Page 54: ...he formula shown on page 52 the estimated VIPER current in standby is 405mA 5mA 62mA 236mA 0mA 107mA 5mA 535mW 25mW Example 2 VIPER at 400MHz with 100MHz external memory LCD with backlight on In this case the power consumed by the respective categories is VIPER current norm 405mA tolerance accounted for in CPU current saving Processor current saving 92 15mA On board peripheral current saving 0mA E...

Page 55: ... following table to the LTC1659 DAC Please see the LTC1659 datasheet and Intel PXA255 Processor Electrical Mechanical and Thermal Specification on the Development Kit CD DAC Data Hex Value CPU Core Voltage Comment 0x000 1 65V Not recommended to set the VCORE above 1 3V as the power consumption will increase for no performance benefit 0x325 1 29V Typical VCORE for peak voltage range at 400MHz opera...

Page 56: ... lane Most Significant Byte Least Significant Byte Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Field R_DIS AUTO_ CLR RETRIG Reset X X X X X X X X 0 0 0 0 0 0 0 0 R W W Address 0x14100002 ICR bit functions Bit Name Value Function 0 No interrupt retrigger embedded Linux VxWorks 0 RETRIG 1 Interrupt retrigger Windows CE NET 0 No auto clear interrupt toggle GPIO1 on new interrupt 1 AUTO_CLR 1 Auto clear...

Page 57: ... RS232 drivers Placing the drivers in shutdown mode can reduce the power consumption of the VIPER by up to 57mA 285mW GPIO12 GPIO13 Operation Status Transmitters Receivers 0 0 Normal Operation Active Active 0 1 Receiver Disabled Active High Z 1 X Shutdown High Z High Z CompactFLASH power management The power supply to the CompactFLASH interface is controlled via software and supports hot swap card...

Page 58: ...the digital and analog interfaces can reduce consumption by up to 54mA 270mW To shut down the AC 97 Codec the software must write to the relevant bits in the Powerdown Control Status Register 26h Please see the LM4548A datasheet contained on the Development Kit CD Wake up events When the PXA255 processor is placed into sleep mode a number of different sources can be used to wake the processor Belo...

Page 59: ... shows the location of the connectors LEDs and jumpers on the VIPER PL17 PL6 LK1 PL4 PL2 PL1 PL16 PL11 PL12 PL10 PL9 Flash PL7 PL5 PL3 Access LED The connectors on the following pages are shown in the same orientation as the picture above unless otherwise stated 2004 Arcom Issue H 59 ...

Page 60: ... page 62 PL4 Serial Ports PL4 COMS ports page 63 PL5 CompactFLASH type I II PL5 CompactFLASH connector page 64 PL6 Audio PL6 Audio connector page 65 PL7 USB PL7 USB connector page 65 PL9 GPIO PL9 GPIO connector page 66 PL10 JTAG PL10 JTAG connector page 66 PL11 64 way PC 104 expansion PL11 PL12 PC 104 connectors page 67 PL12 40 way PC 104 expansion PL11 PL12 PC 104 connectors page 67 PL13 Factory ...

Page 61: ...tome 71600 008 Pin Signal Name Pin Signal Name 1 TX 2 TX 3 RX 4 RJ 2 5 RJ 2 6 RX 7 RJ 1 8 LANGND PL2 Ethernet status LED s connector Connector Molex 87089 0616 6 way 2mm 0 079 x 2mm 0 079 pin header Mating connector Molex 51110 0650 Mating connector crimps x6 Molex 50394 8100 Pin Signal Name Pin Signal Name 1 3 3V 2 Link 3 3 3V 4 Activity 5 NC 6 NC 2004 Arcom Issue H 61 ...

Page 62: ...Signal Name 1 BLKEN 2 BLKSAFE 3 GND 4 GND 5 NEGBIAS 6 LCDSAFE 7 GPIO16 PWM0 8 POSBIAS 9 GND 10 GND 11 FPD0 12 FPD1 13 FPD2 14 FPD3 15 GND 16 GND 17 FPD4 18 FPD5 19 FPD6 20 FPD7 21 GND 22 GND 23 FPD8 24 FPD9 25 FPD10 26 FPD11 27 GND 28 GND 29 FPD12 30 FPD13 31 FPD14 32 FPD15 33 GND 34 GND 35 FCLK 36 BIAS DE 37 GND 38 GND 39 PCLK 40 LCLK As viewed from the connector pins 2004 Arcom Issue H 62 ...

Page 63: ...ignal Name 1 NC 2 NC 3 NC 4 NC 5 TX5 RS422 TX5 RX5 RS485 6 TX5 RS422 TX5 RX5 RS485 7 RX5 RS422 8 RX5 RS422 9 GND 10 GND 11 TX3 12 RX3 13 RX2 14 RTS2 15 TX2 16 CTS2 17 GND 18 GND 19 GND 20 NC 21 DCD4 22 DSR4 23 RX4 24 RTS4 25 TX4 26 CTS4 27 DTR4 28 RI4 29 GND 30 NC 31 DCD1 32 DSR1 33 RX1 34 RTS1 35 TX1 36 CTS1 37 DTR1 38 RI1 39 GND 40 NC As viewed from the connector pins 2004 Arcom Issue H 63 ...

Page 64: ...D 27 D11 2 D03 28 D12 3 D04 29 D13 4 D05 30 D14 5 D06 31 D15 6 D07 32 CE2 7 CE1 33 VS1 GND 8 A10 34 IORD 9 OE 35 IOWR 10 A09 36 WE 11 A08 37 RDY BSY 12 A07 38 3 3V 13 3 3V 39 GND 14 A06 40 N C 15 A05 41 RESET 16 A04 42 WAIT 17 A03 43 INPACK NU 18 A02 44 REG 19 A01 45 N C 20 A00 46 N C 21 D00 47 D08 22 D01 48 D09 23 D02 49 D10 24 IOCS16 50 GND 25 CD2 2004 Arcom Issue H 64 ...

Page 65: ...l Name 1 LEFT IN 2 LEFT OUT 3 GND 4 GND 5 RIGHT IN 6 RIGHT OUT 7 GND 8 AMP LEFT OUT 9 GND 10 MIC IN 11 AMP RIGHT OUT 12 GND PL7 USB connector Connector Oupiin 2015 2 X 5 G D 10 way 2 54mm 0 1 x 2 54mm 0 1 dual row header Mating connector Framatome 71600 010 Pin Signal Name Pin Signal Name 1 VBUS 1 2 VBUS 2 3 DNEG 1 4 DNEG 2 5 DPOS 1 6 DPOS 2 7 GND 8 GND 9 SHIELD 10 SHIELD 2004 Arcom Issue H 65 ...

Page 66: ...gnal Name Pin Signal Name 1 5V 2 5V 3 IN0 4 IN1 5 IN2 6 IN3 7 IN4 8 IN5 9 IN6 10 IN7 11 OUT0 12 GND 13 OUT0_ INVERTED 14 OUT1 15 OUT2 16 OUT3 17 OUT4 18 OUT5 19 OUT6 20 OUT7 PL10 JTAG connector Connector Oupiin 2015 2 X 5 G D 10 way 2 54mm 0 1 x 2 54mm 0 1 dual row header Mating connector Framatome 71600 010 Pin Signal Name Pin Signal Name 1 VCC3 2 NC 3 GND 4 nTRST 5 NC 6 TDI 7 TDO 8 TMS 9 TCLK 10...

Page 67: ...0 GND GND 9 D0 12V 1 MEMCS16 SBHE 10 IOCHRDY KEY 2 IOCS16 LA23 11 AEN SMEMW 3 IRQ10 LA22 12 A19 SMEMR 4 IRQ11 LA21 13 A18 IOW 5 IRQ12 LA20 14 A17 IOR 6 NU IRQ15 LA19 15 A16 NU DACK3 7 NU IRQ14 LA18 16 A15 NU DRQ3 8 NU DACK0 LA17 17 A14 NU DACK1 9 NU DRQ0 MEMR 18 A13 NU DRQ1 10 NU DACK5 MEMW 19 A12 NU REFSH 11 NU DRQ5 D8 20 A11 8MHz Clk 12 NU DACK6 D9 21 A10 IRQ7 13 NU DRQ6 D10 22 A9 IRQ6 14 NU DAC...

Page 68: ... 8 Serial Real Time Clock 12V connection defined but is not required for the VIPER under normal operation It can be used to supply 12V to the PC 104 stack if required A momentary switch push to make may be connected across Reset and GND Do not connect the switch across Reset and 5V or 12V PL17 LK1 Jumper header Connector Oupiin 2015 2 X 8 G D 16 way 2 54mm 0 1 x 2 54mm 0 1 dual row header Ref Pin ...

Page 69: ...VIPER Connectors LEDs and jumpers Status LED s There is a single status LED on the VIPER which indicates FLASH access to the bootloader FLASH or the main FLASH memory Silicon Disk 2004 Arcom Issue H 69 ...

Page 70: ...o clockwise to match the VIPER picture on page 59 Reset LK1 A momentary switch push to make may be connected to LK1 When the button is pressed the board goes into a full hardware reset When the switch is released open circuit the board reboots User configurable jumper 1 LK2 This jumper can be used by an application program to signify a configuration setting LK2 Description GPIO7 read as 0 GPIO7 re...

Page 71: ...fy a configuration setting LK4 Description RS485 TX RX RS422 TX line termination resistor 120Ω connected RS485 TX RX RS422 TX line termination resistor 120Ω disconnected LK5 Description RS422 RX line termination resistor 120Ω connected RS422 RX line termination resistor 120Ω disconnected LK6 LK7 Description RS485 half duplex RS422 full duplex Only fit LK4 and LK5 if the VIPER is at the end of the ...

Page 72: ...ms is solely and wholly the responsibility of the buyer Arcom s entire liability in respect of the boards or systems is as set out in Arcom s standard terms and conditions of sale If you intend to write your own low level software you can start with the source code on the disk supplied This is example code only to illustrate use on Arcom s products It has not been commercially tested No warranty i...

Page 73: ...7 compliant CODEC stereo USB Dual channel v1 1 host support factory fit device option Temperature Operating 20o C 4o F to 70o C 158o F commercial 40o C 40o F to 85o C 185o F industrial Humidity 10 to 90 RH non condensing Real Time Clock Accuracy 1 minute month Software RedBoot Bootloader for embedded Linux or VxWorks Eboot Bootloader for Windows CE NET Power Requirement 5V 5 2W typical consumption...

Page 74: ...4 82 55 8 2 93 5 63 82 55 0 00 16 39 39 95 A A Ø3 18 FOUR A HOLES 87 3 4 Unit of measure mm 1inch 25 4mm A A Chassis ground mounting positions When mounting the VIPER use only M3 metric or 4 40 US screws The mounting pad is 6 35mm 0 25 and the hole is 3 175mm 0 125 so ensure any washers fitted are smaller than the pad Using oversized screws and washers or tooth locking washers can cause short circ...

Page 75: ...ion www usb org CFA CompactFlash Association CF and CompactFlash Specification and product information http www compactflash org Intel Intel XScale PXA255 processor documentation www intel com http www intel com design pca prodbref 252780 htm Standard Microsystems Corporation SMSC SMC91C111 Ethernet Controller documentation www smsc com Exar Corporation Exar XR16C2852 DUART with 128Byte FIFO docum...

Page 76: ...548A AC 97 Codec documentation http www philips com Maxim Integrated Products Inc Maxim DS1307 64 x 8 Serial Real Time Clock documentation http www maxim ic com Linear Technology Corporation Linear Technology LTC1659 Micropower DAC documentation http www linear com 2004 Arcom Issue H 76 ...

Page 77: ...ystal Display LSB Least Significant Bit NA Not Applicable NC No Connect NU Not Used NiMH Nickel Metal Hydride OS Operating System PROM Programmable Read Only Memory PWM Pulse Width Modulation QVGA Quarter VGA display resolution 320 x 240 pixels REF DES Reference Designator Component Identification Number on the PCB RTC Real Time Clock SBC Single Board Computer SDRAM Synchronous Dynamic Random Acce...

Page 78: ...ct details 72 B controller graphics 73 backlight 6 brightness 32 D enable 31 inverter connector 37 dark boot 70 base TX ethernet 43 digital I O 5 battery 51 73 dimensions 73 battery input 5 display 29 block diagram 13 board 4 E bootloader 6 12 FLASH 23 EMC 9 breakout board 43 EPROM 6 bus ethernet 5 6 12 43 expansion 12 breakout board 43 connector 61 C LED 5 power management 57 cache 6 expansion bu...

Page 79: ...al 73 J peripheral control module 16 PL1 59 60 61 JTAG 5 PL10 59 60 66 JTAG connector 66 PL11 59 60 67 jumper 5 7 59 70 PL12 59 60 67 header 68 PL13 60 PL16 59 60 68 L PL17 59 60 68 LAN 12 PL2 59 60 61 LCD 29 33 PL3 59 60 62 backlight brightness 32 PL4 59 60 63 backlight enable 31 PL5 59 60 64 connector 62 PL6 59 60 65 generic connector 35 PL7 59 60 65 logic supply enable 32 PL9 59 60 SBC cable co...

Page 80: ... 11 45 Silicon Disk 6 23 size 7 software 73 specification 73 SRAM 6 static 9 static RAM 24 status LED 69 STN 5 30 33 bias connector 37 StrataFLASH 5 support 8 technical 72 system control module 16 memory 6 T technical support 72 temperature 73 TFT 5 6 29 33 timer watchdog 22 U UART 6 power management 57 USB 5 6 12 75 connector 65 interface 42 power management 58 V video 6 W wake up events 58 watch...

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