2192-12132-000-000
Dual Scan
Panel Data
Bus Bit
Dual Scan
Colour STN
Single Scan
Colour STN
Mono STN
FPD 15
DL6(G)
FPD 14
DL6(R)
FPD 13
DL5(B)
FPD 12
DL4(G)
FPD 11
DL3(R)
FPD 10
DL2(B)
FPD 9
DL1(G)
FPD 8
DL0(R)
FPD 7
DU7(G)
D7(G)
DL3
FPD 6
DU6(R)
D6(R)
DL2
FPD 5
DU5(B)
D5(B)
DL1
FPD 4
DU4(G)
D4(G)
DL0
FPD 3
DU3(R)
D3(R)
DU3
FPD 2
DU2(B)
D2(B)
DU2
FPD 1
DU1(G)
D1(G)
DU1
FPD 0
DU0(R)
D0(R)
DU0
Below is a table covering the clock signals required for passive and active type displays:
VIPER Pin
Active Display
Signal (TFT)
Passive Display Signal
(STN)
PCLK Clock
Pixel
Clock
LCLK
Horizontal Sync
Line Clock
FCLK
Vertical Sync
Frame Clock
BIAS
DE (Data Enable)
Bias
The display signals are +3.3V compatible; the VIPER contains power control circuitry for the flat
panel logic supply and backlight supply. The flat panel can be supplied with a switched 3.3V
supply while the backlight can be supplied with a switched 5V supply. As there is no on-board
protection for these switched supplies, care should be taken not to draw too much current
(Refer to the Power Supply section for details).
Care must be taken during power up/down to ensure the panel is not damaged due to the input
signals being incorrectly configured. Typically the power up and power down sequence is as
follows, please check the datasheet for the particular panel in use.
Power Up:
1. Enable Display VCC
2. Enable Flat panel interface
3. Enable
Backlight
Power Down is in reverse order.
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