1
2
3
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8
A
B
C
D
8
7
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1
D
C
B
A
ISSUE
DRAWING NO.
23425
DRAWING TITLE
Drawn by:
DATE
Filename
ECO No.
DESCRIPTION OF CHANGE
J:\Change_Control\ECO_AGENDA\01_1127 CD62T RLEASE\Motherboard\l933ct_2.1.ddb - L933_2.1.prj
A & R Cambridge Ltd.
Pembroke Avenue
Denny Industrial Centre
Waterbeach
Cambridge CB5 9PB
CD62T - TOP LEVEL SCHEMATIC
Circuit Diagram
L933CT
TGP
19-Jul-2001
INITIALS
Date Printed
6
7
Sheet
of
Notes:
FILA
FILB
L933C2_1
L933C2_2.1.sch
FILA
FILB
BCLK
ADATA
LRCK
RC5 IP
17MHZ
RESET
DIGOP
EMPHASIS
L933C3_1
L933C3_2.1.sch
DEEM
LRCK
ADATA
BCLK
RESET
17MHZ
L933C4_1
L933C4_2.1.sch
DIGOP
RC5RP
L933C5_1
L933C5_2.1.sch
POWER SUPPLIES
MECH INTERCONNECTS
DAC AND OSCILLATOR
RC5 INPUT AND DIG OUTPUTS
0V_1
0V_2
0V_SIG
0V_MOT
0V_DIG
0V_3
0V_9DAC
FIX151
FIXING HOLE 3.2
FIX150
FIXING HOLE 3.5
FIX152
FIXING HOLE 3.5
FIX153
FIXING HOLE 3.5
FIX157
FIXING HOLE 3.2
FIX155
FIXING HOLE 3.5
FIX156
FIXING HOLE 3.5
FIX154
FIXING HOLE 3.5
(EARTH BY IEC SOCKET)
C150
1N0 CD
C151
1N0 CD
C152
1N0 CD
C153
1N0 CD
C154
1N0 CD
C155
1N0 CD
C156
1N0 CD
0V_DIG
0V_DIG
0V_DIG
0V_DIG
0V_DIG
0V_DIG
0V_DIG
SP100
STARPOINT
L933C7_1
L933C7_2.1.sch
L933C1_1
L933C1_2.1.sch
DISPLAY PCB
DISPLAY AND MICROCONTROLLER
2.1
0V_DIG
0V_9DAC
LK601
0R0 MF
LK600
0R0 MF
Please refer to the CD72T (Master) schematic if changes are to be made to this schematic!
USE EXCLUDE NF WHEN CREATING BILL OF MATERIALS
Production Release
NF
01_1127
TGP
18 July 2001